A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding - researchr publication authors

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Sinan Yalcin, Hasan F. Ates, Ilker Hamzaoglu. A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 509-514, IEEE, 2005.

This author has not been identified. Look up 'Sinan Yalcin' in GoogleThis author has not been identified. Look up 'Hasan F. Ates' in GoogleThis author has not been identified. Look up 'Ilker Hamzaoglu' in Google

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