FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture

Jing Yan, Ning-Yi Xu, Xiongfei Cai, Rui Gao, Yu Wang 0002, Rong Luo, Feng-hsiung Hsu. FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture. In Martin Danek, Jiri Kadlec, Brent E. Nelson, editors, 19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic. pages 662-665, IEEE, 2009. [doi]

@inproceedings{YanXCGWLH09,
  title = {FPGA-based acceleration of neural network for ranking in web search engine with a streaming architecture},
  author = {Jing Yan and Ning-Yi Xu and Xiongfei Cai and Rui Gao and Yu Wang 0002 and Rong Luo and Feng-hsiung Hsu},
  year = {2009},
  doi = {10.1109/FPL.2009.5272343},
  url = {http://dx.doi.org/10.1109/FPL.2009.5272343},
  tags = {architecture, search},
  researchr = {https://researchr.org/publication/YanXCGWLH09},
  cites = {0},
  citedby = {0},
  pages = {662-665},
  booktitle = {19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic},
  editor = {Martin Danek and Jiri Kadlec and Brent E. Nelson},
  publisher = {IEEE},
  isbn = {978-1-4244-3892-1},
}