An HDL-synthesized gated-edge-injection PLL with a current output DAC

Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa. An HDL-synthesized gated-edge-injection PLL with a current output DAC. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 2-3, IEEE, 2015. [doi]

@inproceedings{YangDUSKOM15,
  title = {An HDL-synthesized gated-edge-injection PLL with a current output DAC},
  author = {Dongsheng Yang and Wei Deng and Tomohiro Ueno and Teerachot Siriburanon and Satoshi Kondo and Kenichi Okada and Akira Matsuzawa},
  year = {2015},
  doi = {10.1109/ASPDAC.2015.7058917},
  url = {http://dx.doi.org/10.1109/ASPDAC.2015.7058917},
  researchr = {https://researchr.org/publication/YangDUSKOM15},
  cites = {0},
  citedby = {0},
  pages = {2-3},
  booktitle = {The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7792-5},
}