Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA

Pengfei Yang, Quan Wang, Jiyang Zhang. Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA. Multimedia Tools Appl., 75(8):4723-4733, 2016. [doi]

@article{YangWZ16-0,
  title = {Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA},
  author = {Pengfei Yang and Quan Wang and Jiyang Zhang},
  year = {2016},
  doi = {10.1007/s11042-015-2499-3},
  url = {http://dx.doi.org/10.1007/s11042-015-2499-3},
  researchr = {https://researchr.org/publication/YangWZ16-0},
  cites = {0},
  citedby = {0},
  journal = {Multimedia Tools Appl.},
  volume = {75},
  number = {8},
  pages = {4723-4733},
}