Low Power Adiabatic Programmable Logic Array with Single Clock Iapdl

W. J. Yang, Y. Zhou, K. T. Lau. Low Power Adiabatic Programmable Logic Array with Single Clock Iapdl. Journal of Circuits, Systems, and Computers, 17(2):211-219, 2008. [doi]

@article{YangZL08:1,
  title = {Low Power Adiabatic Programmable Logic Array with Single Clock Iapdl},
  author = {W. J. Yang and Y. Zhou and K. T. Lau},
  year = {2008},
  doi = {10.1142/S0218126608004307},
  url = {http://dx.doi.org/10.1142/S0218126608004307},
  tags = {logic programming, logic},
  researchr = {https://researchr.org/publication/YangZL08%3A1},
  cites = {0},
  citedby = {0},
  journal = {Journal of Circuits, Systems, and Computers},
  volume = {17},
  number = {2},
  pages = {211-219},
}