A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Mari Yasunaga, Junnosuke Suzuki, Masato Watanabe, Kazushi Kawamura, Thiem Van Chu, Jaehoon Yu, Masato Motomura. A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations. In 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023. pages 478-485, IEEE, 2023. [doi]

This author has not been identified. Look up 'Mari Yasunaga' in GoogleThis author has not been identified. Look up 'Junnosuke Suzuki' in GoogleThis author has not been identified. Look up 'Masato Watanabe' in GoogleThis author has not been identified. Look up 'Kazushi Kawamura' in GoogleThis author has not been identified. Look up 'Thiem Van Chu' in GoogleThis author has not been identified. Look up 'Jaehoon Yu' in GoogleThis author has not been identified. Look up 'Masato Motomura' in Google

runs on WebDSL