Multiple target performance evaluation model for HD video encoder VLSI architecture design - researchr publication related

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Haibing Yin, Shizhong Li, Hongqi Hu. Multiple target performance evaluation model for HD video encoder VLSI architecture design. In 2013 Visual Communications and Image Processing, VCIP 2013, Kuching, Malaysia, November 17-20, 2013. pages 1-4, IEEE, 2013. [doi]

The following publications are possibly variants of this publication:

A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video EncodingYu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-Wen Hou, Yi-Hsien Li, Hao-Tin Huang, Youn-Long Lin. apccas 2006: 562-565 [doi]

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