Conflict-Free Loop Mapping for Coarse-Grained Reconfigurable Architecture with Multi-Bank Memory

Shouyi Yin, Xianqing Yao, Tianyi Lu, Dajiang Liu, Jiangyuan Gu, Leibo Liu, Shaojun Wei. Conflict-Free Loop Mapping for Coarse-Grained Reconfigurable Architecture with Multi-Bank Memory. IEEE Trans. Parallel Distrib. Syst., 28(9):2471-2485, 2017. [doi]

@article{YinYLLGLW17,
  title = {Conflict-Free Loop Mapping for Coarse-Grained Reconfigurable Architecture with Multi-Bank Memory},
  author = {Shouyi Yin and Xianqing Yao and Tianyi Lu and Dajiang Liu and Jiangyuan Gu and Leibo Liu and Shaojun Wei},
  year = {2017},
  doi = {10.1109/TPDS.2017.2682241},
  url = {http://doi.ieeecomputersociety.org/10.1109/TPDS.2017.2682241},
  researchr = {https://researchr.org/publication/YinYLLGLW17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Parallel Distrib. Syst.},
  volume = {28},
  number = {9},
  pages = {2471-2485},
}