A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards

Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae. A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 212, IEEE, 2015. [doi]

Authors

Taehun Yoon

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Joon-Yeong Lee

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Kwangseok Han

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Jeong-Sup Lee

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Sangeun Lee

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Taeho Kim

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Hyosup Won

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Jinho Park

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Hyeon-Min Bae

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