A diagnosis method for single logic design errors in gate-level combinational circuits

Atsushi Yoshikawa, Seiji Kajihara, Masahiro Numa, Kozo Kinoshita. A diagnosis method for single logic design errors in gate-level combinational circuits. Systems and Computers in Japan, 28(6):30-39, 1997. [doi]

Authors

Atsushi Yoshikawa

This author has not been identified. Look up 'Atsushi Yoshikawa' in Google

Seiji Kajihara

This author has not been identified. Look up 'Seiji Kajihara' in Google

Masahiro Numa

This author has not been identified. Look up 'Masahiro Numa' in Google

Kozo Kinoshita

This author has not been identified. Look up 'Kozo Kinoshita' in Google