QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism

Wei Yuan, Teng Tian, Qizhe Wu, Xi Jin. QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism. Journal of Systems Architecture, 129:102596, 2022. [doi]

@article{YuanTWJ22,
  title = {QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism},
  author = {Wei Yuan and Teng Tian and Qizhe Wu and Xi Jin},
  year = {2022},
  doi = {10.1016/j.sysarc.2022.102596},
  url = {https://doi.org/10.1016/j.sysarc.2022.102596},
  researchr = {https://researchr.org/publication/YuanTWJ22},
  cites = {0},
  citedby = {0},
  journal = {Journal of Systems Architecture},
  volume = {129},
  pages = {102596},
}