Self authentication path insertion in FPGA-based design flow for tamper-resistant purpose

Sharareh Zamanzadeh, Ali Jahanian 0001. Self authentication path insertion in FPGA-based design flow for tamper-resistant purpose. ISeCure, 8(1):53-60, 2016. [doi]

@article{Zamanzadeh016,
  title = {Self authentication path insertion in FPGA-based design flow for tamper-resistant purpose},
  author = {Sharareh Zamanzadeh and Ali Jahanian 0001},
  year = {2016},
  doi = {10.22042/isecure.2016.8.1.3},
  url = {https://doi.org/10.22042/isecure.2016.8.1.3},
  researchr = {https://researchr.org/publication/Zamanzadeh016},
  cites = {0},
  citedby = {0},
  journal = {ISeCure},
  volume = {8},
  number = {1},
  pages = {53-60},
}