A fault-tolerant cache architecture based on binary set partitioning

Hamid R. Zarandi, Seyed Ghassem Miremadi. A fault-tolerant cache architecture based on binary set partitioning. Microelectronics Reliability, 46(1):86-99, 2006. [doi]

@article{ZarandiM06,
  title = {A fault-tolerant cache architecture based on binary set partitioning},
  author = {Hamid R. Zarandi and Seyed Ghassem Miremadi},
  year = {2006},
  doi = {10.1016/j.microrel.2005.02.009},
  url = {http://dx.doi.org/10.1016/j.microrel.2005.02.009},
  tags = {rule-based, caching, architecture, partitioning},
  researchr = {https://researchr.org/publication/ZarandiM06},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {46},
  number = {1},
  pages = {86-99},
}