Redundant Vias Insertion for Performance Enhancement in 3D ICs

Xu Zhang, Xiaohong Jiang, Susumu Horiguchi. Redundant Vias Insertion for Performance Enhancement in 3D ICs. IEICE Transactions, 91-C(4):571-580, 2008. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.