Yongqiang Zhang, Hongjun Lv, Huakun Du, Cheng Huang, Shuai Liu, Guangjun Xie. Modular design of QCA carry flow adders and multiplier with reduced wire crossing and number of logic gates. I. J. Circuit Theory and Applications, 44(7):1351-1366, 2016. [doi]
@article{ZhangLDHLX16,
title = {Modular design of QCA carry flow adders and multiplier with reduced wire crossing and number of logic gates},
author = {Yongqiang Zhang and Hongjun Lv and Huakun Du and Cheng Huang and Shuai Liu and Guangjun Xie},
year = {2016},
doi = {10.1002/cta.2163},
url = {https://doi.org/10.1002/cta.2163},
researchr = {https://researchr.org/publication/ZhangLDHLX16},
cites = {0},
citedby = {0},
journal = {I. J. Circuit Theory and Applications},
volume = {44},
number = {7},
pages = {1351-1366},
}