SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS

Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang. SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 306, IEEE, 2019. [doi]

@inproceedings{ZhangLLSKZ19,
  title = {SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS},
  author = {Jie-Fang Zhang and Ching-En Lee and Chester Liu and Yakun Sophia Shao and Stephen W. Keckler and Zhengya Zhang},
  year = {2019},
  doi = {10.23919/VLSIC.2019.8778193},
  url = {https://doi.org/10.23919/VLSIC.2019.8778193},
  researchr = {https://researchr.org/publication/ZhangLLSKZ19},
  cites = {0},
  citedby = {0},
  pages = {306},
  booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
  publisher = {IEEE},
  isbn = {978-4-86348-720-8},
}