Boyan Zhang, Jinhao Li 0007, Yuan Wang, Jialiang Yin, Linying Liu, Hongchao Zhang, Chengyuan Sun, Hong-xi Liu, Xuan Li, Kaihua Cao, Zhaohao Wang, Wenlong Cai, He Zhang 0011. Design and Implementation of a Scalable 64 p-bits Ising Computing Chip with Integrated SOT-MTJs for Efficient Computing. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 2495-2499, IEEE, 2026. [doi]
@inproceedings{ZhangLWYLZSLLCWCZ26,
title = {Design and Implementation of a Scalable 64 p-bits Ising Computing Chip with Integrated SOT-MTJs for Efficient Computing},
author = {Boyan Zhang and Jinhao Li 0007 and Yuan Wang and Jialiang Yin and Linying Liu and Hongchao Zhang and Chengyuan Sun and Hong-xi Liu and Xuan Li and Kaihua Cao and Zhaohao Wang and Wenlong Cai and He Zhang 0011},
year = {2026},
doi = {10.1109/ISCAS66217.2026.11562679},
url = {https://doi.org/10.1109/ISCAS66217.2026.11562679},
researchr = {https://researchr.org/publication/ZhangLWYLZSLLCWCZ26},
cites = {0},
citedby = {0},
pages = {2495-2499},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026},
publisher = {IEEE},
isbn = {979-8-3315-7769-8},
}