Weilong Zhang, Leibo Liu, Shouyi Yin, Renyan Zhou, Shanshan Cai, Shaojun Wei. An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video. Science in China Series F: Information Sciences, 56(7):1-14, 2013. [doi]
@article{ZhangLYZCW13,
title = {An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video},
author = {Weilong Zhang and Leibo Liu and Shouyi Yin and Renyan Zhou and Shanshan Cai and Shaojun Wei},
year = {2013},
doi = {10.1007/s11432-013-4786-9},
url = {http://dx.doi.org/10.1007/s11432-013-4786-9},
researchr = {https://researchr.org/publication/ZhangLYZCW13},
cites = {0},
citedby = {0},
journal = {Science in China Series F: Information Sciences},
volume = {56},
number = {7},
pages = {1-14},
}