Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution

Ming Z. Zhang, Hau T. Ngo, Vijayan K. Asari. Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution. Microprocessors and Microsystems, 31(1):25-37, 2007. [doi]

Authors

Ming Z. Zhang

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Hau T. Ngo

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Vijayan K. Asari

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