An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic

Yimeng Zhang, Leona Okamura, Tsutomu Yoshihara. An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic. IEICE Transactions, 94-C(4):605-612, 2011. [doi]

@article{ZhangOY11,
  title = {An Energy Efficiency 4-bit Multiplier with Two-Phase Non-overlap Clock Driven Charge Recovery Logic},
  author = {Yimeng Zhang and Leona Okamura and Tsutomu Yoshihara},
  year = {2011},
  url = {http://search.ieice.org/bin/summary.php?id=e94-c_4_605},
  tags = {logic},
  researchr = {https://researchr.org/publication/ZhangOY11},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {94-C},
  number = {4},
  pages = {605-612},
}