A High Throughput Parallel Hash Table on FPGA using XOR-based Memory

Ruizhi Zhang 0002, Sasindu Wijeratne, Yang Yang, Sanmukh R. Kuppannagari, Viktor K. Prasanna. A High Throughput Parallel Hash Table on FPGA using XOR-based Memory. In 2020 IEEE High Performance Extreme Computing Conference, HPEC 2020, Waltham, MA, USA, September 22-24, 2020. pages 1-7, IEEE, 2020. [doi]

@inproceedings{ZhangWYKP20,
  title = {A High Throughput Parallel Hash Table on FPGA using XOR-based Memory},
  author = {Ruizhi Zhang 0002 and Sasindu Wijeratne and Yang Yang and Sanmukh R. Kuppannagari and Viktor K. Prasanna},
  year = {2020},
  doi = {10.1109/HPEC43674.2020.9286199},
  url = {https://doi.org/10.1109/HPEC43674.2020.9286199},
  researchr = {https://researchr.org/publication/ZhangWYKP20},
  cites = {0},
  citedby = {0},
  pages = {1-7},
  booktitle = {2020 IEEE High Performance Extreme Computing Conference, HPEC 2020, Waltham, MA, USA, September 22-24, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-9219-2},
}