Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs

Jie Zhang 0039, Hong Zhang, Bo Yang, Ruizhi Zhang. Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs. IET Circuits, Devices & Systems, 13(2):203-210, 2019. [doi]

@article{ZhangZYZ19-0,
  title = {Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs},
  author = {Jie Zhang 0039 and Hong Zhang and Bo Yang and Ruizhi Zhang},
  year = {2019},
  doi = {10.1049/iet-cds.2018.5194},
  url = {https://doi.org/10.1049/iet-cds.2018.5194},
  researchr = {https://researchr.org/publication/ZhangZYZ19-0},
  cites = {0},
  citedby = {0},
  journal = {IET Circuits, Devices & Systems},
  volume = {13},
  number = {2},
  pages = {203-210},
}