Design and Implementation of an Improved GEP Algorithm for Synthesis of Reversible Logic Circuits - researchr publication authors

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Shuguang Zhao, Chaozheng Wang, Kaixiang Xia. Design and Implementation of an Improved GEP Algorithm for Synthesis of Reversible Logic Circuits. In Proceedings of the 9th International Conference on Computer and Automation Engineering, ICCAE '17, Sydney, Australia, February 18-21, 2017. pages 174-178, ACM, 2017. [doi]

This author has not been identified. Look up 'Shuguang Zhao' in GoogleThis author has not been identified. Look up 'Chaozheng Wang' in GoogleThis author has not been identified. Look up 'Kaixiang Xia' in Google

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