Algorithm-Hardware Codesign of a Fast Parallel Routing Architecture for Clos Networks

Si-Qing Zheng, Ashwin Gumaste, Enyue Lu. Algorithm-Hardware Codesign of a Fast Parallel Routing Architecture for Clos Networks. Journal of Interconnection Networks, 11(3-4):189-210, 2010. [doi]

@article{ZhengGL10,
  title = {Algorithm-Hardware Codesign of a Fast Parallel Routing Architecture for Clos Networks},
  author = {Si-Qing Zheng and Ashwin Gumaste and Enyue Lu},
  year = {2010},
  doi = {10.1142/S0219265910002805},
  url = {http://dx.doi.org/10.1142/S0219265910002805},
  tags = {architecture, routing},
  researchr = {https://researchr.org/publication/ZhengGL10},
  cites = {0},
  citedby = {0},
  journal = {Journal of Interconnection Networks},
  volume = {11},
  number = {3-4},
  pages = {189-210},
}