A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet

Yan Zheng, Jingchao Lan, Fan Ye 0001, Junyan Ren. A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet. In Fan Ye, Ting-Ao Tang, editors, 14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021. pages 1-4, IEEE, 2021. [doi]

@inproceedings{ZhengL0R21,
  title = {A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet},
  author = {Yan Zheng and Jingchao Lan and Fan Ye 0001 and Junyan Ren},
  year = {2021},
  doi = {10.1109/ASICON52560.2021.9620375},
  url = {https://doi.org/10.1109/ASICON52560.2021.9620375},
  researchr = {https://researchr.org/publication/ZhengL0R21},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021},
  editor = {Fan Ye and Ting-Ao Tang},
  publisher = {IEEE},
  isbn = {978-1-6654-3867-4},
}