Design space exploration of multiple loops on FPGAs using high level synthesis

Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar. Design space exploration of multiple loops on FPGAs using high level synthesis. In 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014. pages 456-463, IEEE, 2014. [doi]

Authors

Guanwen Zhong

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Vanchinathan Venkataramani

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Yun Liang

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Tulika Mitra

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Smaïl Niar

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