1024-point pipeline FFT processor with pointer FIFOs based on FPGA

Guanwen Zhong, Hongbin Zheng, ZhenHua Jin, Dihu Chen, Zhiyong Pang. 1024-point pipeline FFT processor with pointer FIFOs based on FPGA. In IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011. pages 122-125, IEEE, 2011. [doi]

@inproceedings{ZhongZJCP11,
  title = {1024-point pipeline FFT processor with pointer FIFOs based on FPGA},
  author = {Guanwen Zhong and Hongbin Zheng and ZhenHua Jin and Dihu Chen and Zhiyong Pang},
  year = {2011},
  doi = {10.1109/VLSISoC.2011.6081654},
  url = {http://dx.doi.org/10.1109/VLSISoC.2011.6081654},
  researchr = {https://researchr.org/publication/ZhongZJCP11},
  cites = {0},
  citedby = {0},
  pages = {122-125},
  booktitle = {IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011},
  publisher = {IEEE},
  isbn = {978-1-4577-0171-9},
}