A High-Performance Dual-Issue RISC-V Core Addressing Data Hazard for IoT

Xinyu Zhu, Hongge Li, Yumeng Liu, Yiping Jiang, Yinjie Song. A High-Performance Dual-Issue RISC-V Core Addressing Data Hazard for IoT. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 1422-1426, IEEE, 2026. [doi]

@inproceedings{ZhuLLJS26,
  title = {A High-Performance Dual-Issue RISC-V Core Addressing Data Hazard for IoT},
  author = {Xinyu Zhu and Hongge Li and Yumeng Liu and Yiping Jiang and Yinjie Song},
  year = {2026},
  doi = {10.1109/ISCAS66217.2026.11562698},
  url = {https://doi.org/10.1109/ISCAS66217.2026.11562698},
  researchr = {https://researchr.org/publication/ZhuLLJS26},
  cites = {0},
  citedby = {0},
  pages = {1422-1426},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026},
  publisher = {IEEE},
  isbn = {979-8-3315-7769-8},
}