A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations

Davide Zoni, Federico Terraneo, William Fornaciari. A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations. VLSI Signal Processing, 83(3):357-371, 2016. [doi]

@article{ZoniTF16,
  title = {A DVFS Cycle Accurate Simulation Framework with Asynchronous NoC Design for Power-Performance Optimizations},
  author = {Davide Zoni and Federico Terraneo and William Fornaciari},
  year = {2016},
  doi = {10.1007/s11265-015-0989-1},
  url = {http://dx.doi.org/10.1007/s11265-015-0989-1},
  researchr = {https://researchr.org/publication/ZoniTF16},
  cites = {0},
  citedby = {0},
  journal = {VLSI Signal Processing},
  volume = {83},
  number = {3},
  pages = {357-371},
}