Global Timing Optimization in Chip Design

Siad Daboul. Global Timing Optimization in Chip Design. PhD thesis, University of Bonn, Germany, 2021. [doi]

@phdthesis{basesearch-17044,
  title = {Global Timing Optimization in Chip Design},
  author = {Siad Daboul},
  year = {2021},
  url = {https://www.base-search.net/Record/01fc230b6a3853028887d4eb01686fd8932ca8c24bae12adea9834b958ef17b3},
  note = {base-search.net (ftunivbonn:oai:bonndoc.ulb.uni-bonn.de:20.500.11811/9036)},
  researchr = {https://researchr.org/publication/basesearch-17044},
  cites = {0},
  citedby = {0},
  school = {University of Bonn, Germany},
}