Formal Analysis of Electronic System Level Models using Satisfiability Modulo Theories and Automata Checking

Che-Wei Chang. Formal Analysis of Electronic System Level Models using Satisfiability Modulo Theories and Automata Checking. PhD thesis, University of California, Irvine, USA, 2015. [doi]

@phdthesis{basesearch-5781,
  title = {Formal Analysis of Electronic System Level Models using Satisfiability Modulo Theories and Automata Checking},
  author = {Che-Wei Chang},
  year = {2015},
  url = {https://www.base-search.net/Record/38bcf47ef93692261f4592abb34d955839a64e31164a568e04b3784f685a02b4},
  note = {base-search.net (ftcdlib:qt1193n1qj)},
  researchr = {https://researchr.org/publication/basesearch-5781},
  cites = {0},
  citedby = {0},
  school = {University of California, Irvine, USA},
}