New data synchronization & mapping strategies for PACE - VLSI processor architecture

Yifan Xu. New data synchronization & mapping strategies for PACE - VLSI processor architecture. PhD thesis, University of Nottingham, UK, 1995. [doi]

@phdthesis{ethos-8258,
  title = {New data synchronization & mapping strategies for PACE - VLSI processor architecture},
  author = {Yifan Xu},
  year = {1995},
  url = {http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.283229},
  note = {British Library, EThOS},
  researchr = {https://researchr.org/publication/ethos-8258},
  cites = {0},
  citedby = {0},
  school = {University of Nottingham, UK},
}