Extraction of MOS VLSI Circuit Models Including Critical Interconnect Parasitics

Shun-Lin Su. Extraction of MOS VLSI Circuit Models Including Critical Interconnect Parasitics. PhD thesis, University of Illinois Urbana-Champaign, USA, 1987. [doi]

@phdthesis{us-9446,
  title = {Extraction of MOS VLSI Circuit Models Including Critical Interconnect Parasitics},
  author = {Shun-Lin Su},
  year = {1987},
  url = {https://hdl.handle.net/2142/69381},
  researchr = {https://researchr.org/publication/us-9446},
  cites = {0},
  citedby = {0},
  school = {University of Illinois Urbana-Champaign, USA},
}