- Shireesh Verma. ::::A Special Issue on:::: Low Power Design and Verification Techniques. J. Low Power Electronics, 7(1):1, 2011.
- Edoardo Regini, Daeseob Lim, Tajana Simunic Rosing. Resource Management in Heterogeneous Wireless Sensor Networks. J. Low Power Electronics, 7(2):123-140, 2011.
- Ji-Hye Bong, Kwan-Hee Jo, Kyeong-Sik Min, Sung-Mo Kang. Oxide-Tunneling Leakage Suppressed SRAM for Sub-65-nm Very Large Scale Integrated Circuits. J. Low Power Electronics, 7(1):87-95, 2011.
- Christian Bachmann, Andreas Genser, Christian Steger, Reinhold Weiss, Josef Haid. An Automated Power Emulation Framework for Embedded Software - Detecting Power-Critical Code Regions and Optimizing Software-Induced Power Consumption Peaks. J. Low Power Electronics, 7(2):255-264, 2011.
- Carolina Albea, Diego Puschini, Pascal Vivet, Ivan Miro Panades, Edith Beigné, Suzanne Lesecq. Architecture and Robust Control of a Digital Frequency-Locked Loop for Fine-Grain Dynamic Voltage and Frequency Scaling in Globally Asynchronous Locally Synchronous Structures. J. Low Power Electronics, 7(3):328-340, 2011.
- Basab Datta, Wayne Burleson. Temperature Effects on Practical Energy Optimization of Sub-Threshold Circuits in Deep Nanometer Technologies. J. Low Power Electronics, 7(3):403-419, 2011.
- Abhijit Sil, Magdy Bayoumi. A Bit-Interleaved 2-Port Subthreshold 6T SRAM Array with High Write-Ability and SNM-Free Read in 90 nm. J. Low Power Electronics, 7(1):96-109, 2011.
- Sohaib Majzoub. Instruction-Based Voltage Scaling for Power Reduction in SIMD MPSoCs. J. Low Power Electronics, 7(2):141-147, 2011.
- Aya Mabrouki, Thierry Taris, Yann Deval, Jean-Baptiste Begueret. An Optimum Body Biasing for Gain and Linearity Control in CMOS Low-Noise Amplifiers. J. Low Power Electronics, 7(2):199-208, 2011.
- Rashmi Nanda, Dejan Markovic. Energy-Efficient Retiming and Scheduling of Datapath-Dominant Digital Systems. J. Low Power Electronics, 7(3):341-349, 2011.