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    Journal: VLSI Signal Processing

    Volume 12, Issue 3

    207 -- 221Javier D. Bruguera, Nicolas Guil, Tomás Lang, Julio Villalba, Emilio L. Zapata. Cordic based parallel/pipelined architecture for the Hough transform
    223 -- 246Joseph Thomas. Pipelined systolic architectures for DLMS adaptive filtering
    247 -- 264Tracy C. Denk, Keshab K. Parhi. Lower bounds on memory requirements for statically scheduled DSP programs
    265 -- 285Taewhan Kim, C. L. Liu. An integrated algorithm for incremental data path synthesis

    Volume 12, Issue 2

    115 -- 134Maria Grazia Albanesi, Anna Antola, Marco Ferretti, Roberto M. Negrini. A chip-set for the Generalized Hough Transform
    135 -- 158Jinn-Wang Yeh, Wen-Jiunn Cheng, Chein-Wei Jen. VASS - A VLSI array system synthesizer
    159 -- 175Francis H. Y. Chan, Francis K. Lam, H. F. Li, J. G. Liu. An all adder systolic structure for fast computation of moments
    177 -- 186Roderick McConnell, Dominique Lavenier. Prototyping of VLSI components from a formal specification
    187 -- 202Karl-Heinz Zimmermann. Linear mappings of::::n::::-dimensional uniform recurrences onto::::k::::-dimensional systolic arrays

    Volume 12, Issue 1

    5 -- 0Wayne Luk, Duncan A. Buell. Guest editors introduction
    7 -- 19James B. Peterson, Peter M. Athanas. High-speed 2-D convolution with a custom computing machine
    21 -- 33Laurent Moll, Jean Vuillemin, Philippe Boucard, Lars Lundheim. Real-time high-energy physics applications on DECPeRLe-1 programmable active memory
    35 -- 50Matthew Aubury, Wayne Luk. Binomial filters
    51 -- 66Paul Shaw, W. Paul Cockshott, Peter Barrie. Implementation of lattice gases using FPGAs
    67 -- 86James G. Eldredge, Brad L. Hutchings. Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs
    87 -- 107Ian Page. Constructing hardware-software systems from a single description
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