| 5 | -- | 6 | Wayne Burleson, Naresh R. Shanbhag. Guest Editorial: Reconfigurable Signal Processing Systems |
| 7 | -- | 27 | Russell Tessier, Wayne Burleson. Reconfigurable Computing for Digital Signal Processing: A Survey |
| 29 | -- | 45 | Peter Bellows, Brad L. Hutchings. Designing Run-Time Reconfigurable Systems with JHDL |
| 47 | -- | 61 | Marlene Wan, Hui Zhang, George Varghese, Martin Benes, Arthur Abnous, Vandana Prabhu, Jan M. Rabaey. Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System |
| 63 | -- | 83 | David R. Martinez, Tyler J. Moeller, Ken Teitelbaum. Application of Reconfigurable Computing to a High Performance Front-End Radar Signal Processor |
| 85 | -- | 96 | Nabeel Shirazi, Dan Benyamin, Wayne Luk, Peter Y. K. Cheung, Shaori Guo. Quantitative Analysis of FPGA-based Database Searching |
| 97 | -- | 113 | Jean-Paul Heron, Roger Woods, Sakir Sezer, Richard H. Turner. Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead |
| 115 | -- | 128 | Uwe Meyer-Bäse, Antonio García, Fred J. Taylor. Implementation of a Communications Channelizer using FPGAs and RNS Arithmetic |
| 129 | -- | 143 | Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor. A FPGA-based Library for On-Line Signal Processing |