Architecture and Clock Programmable Baseband of an 800 MHz-6 GHz Software-Defined Wireless Receiver - researchr publication

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R. Bagheri, A. Mirzaei, S. Chehrazi, A. A. Abidi. Architecture and Clock Programmable Baseband of an 800 MHz-6 GHz Software-Defined Wireless Receiver. In 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India. pages 135-140, IEEE Computer Society, 2007. [doi]

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