A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators

Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec. A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(3):384-397, 2017. [doi]

Abstract

Abstract is missing.