IEEE Trans. on CAD of Integrated Circuits and Systems - researchr journal

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He-Teng Zhang, Masahiro Fujita, Chung-Kuan Cheng, Jie-Hong R. Jiang. SAT-Based On-Track Bus Routing. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):735-747, 2021.
Chunfeng Liu, Xing Huang, Bing Li 0005, Hailong Yao, Paul Pop, Tsung-Yi Ho, Ulf Schlichtmann. DCSA: Distributed Channel-Storage Architecture for Flow-Based Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(1):115-128, 2021.
Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan. DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):748-761, 2021.
Gerold Fink, Medina Hamidovic, Werner Haselmayr, Robert Wille. Automatic Design of Droplet-Based Microfluidic Ring Networks. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(2):339-349, 2021.
Junzhe Cai, Changhao Yan, Yudong Tao, Yibo Lin, Sheng-Guo Wang, David Z. Pan, Xuan Zeng 0001. A Novel and Unified Full-Chip CMP Model Aware Dummy Fill Insertion Framework With SQP-Based Optimization Method. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(3):603-607, 2021.
Irith Pomeranz. PRESERVE: Static Test Compaction that Preserves Individual Numbers of Tests. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):803-807, 2021.
Wentai Zhang 0001, Linjun Qiao, William Hsu, Yong Cui, Ming Jiang 0001, Guojie Luo. FPGA Acceleration for 3-D Low-Dose Tomographic Reconstruction. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):666-679, 2021.
Naman Singhal, Priyanka Joshi, Bodhisatwa Mazumdar. Entropy Reduction Model for Pinpointing Differential Fault Analysis on SIMON and SIMECK Ciphers. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(6):1090-1101, 2021.
Javad Saber-Latibari, Mohsen Ansari, Pourya Gohari-Nazari, Sina Yari-Karin, Amir Mahdi Hosseini Monazzah, Alireza Ejlali. READY: Reliability- and Deadline-Aware Power-Budgeting for Heterogeneous Multicore Systems. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(4):646-654, 2021.
Xinyuan Qu, Zhihong Huang, Yu Xu, Ning Mao, Gang Cai, Zhen Fang. Cheetah: An Accurate Assessment Mechanism and a High-Throughput Acceleration Architecture Oriented Toward Resource Efficiency. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(5):878-891, 2021.

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