Power Variance Analysis breaks a masked ASIC implementation of AES

Yang Li, Kazuo Sakiyama, Lejla Batina, D. Nakatsu, Kazuo Ohta. Power Variance Analysis breaks a masked ASIC implementation of AES. In Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010. pages 1059-1064, IEEE, 2010. [doi]

Abstract

Abstract is missing.