Spatial- and temporal-reliability aware design for nano-scale VLSI circuits

Md. Sajjad Rahaman, Qing Duan, Masud H. Chowdhury. Spatial- and temporal-reliability aware design for nano-scale VLSI circuits. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 1057-1060, IEEE, 2011. [doi]

Abstract

Abstract is missing.