Table of Contents

• Nyquist-rate time-interleaved current-steering DAC with dynamic channel matchingLong Cheng, Fan Ye, Hai-Feng Yang, Ning Li, Jun Xu, Junyan Ren. 5-8 [doi]
• A 2.5GS/s 3-bit time-based ADC in 90nm CMOSAndrew R. Macpherson, Kenneth A. Townsend, James W. Haslett. 9-12 [doi]
• An ultra-low-power SAR ADC with an area-efficient DAC architecturePouya Kamalinejad, Shahriar Mirabbasi, Victor C. M. Leung. 13-16 [doi]
• 11 GHz UGBW Op-amp with feed-forward compensation techniqueHitesh Shrimali, Shouri Chatterjee. 17-20 [doi]
• A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection techniqueJames Lin, Masaya Miyahara, Akira Matsuzawa. 21-24 [doi]
• Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applicationsDavide Marano, Gaetano Palumbo, Salvatore Pennisi. 29-32 [doi]
• A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologiesMiao Liu, Pui-In Mak, Zushu Yan, Rui Paulo Martins. 33-36 [doi]
• A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applicationsS. S. Chong, P. K. Chan. 37-40 [doi]
• A versatile low-dropout voltage regulator for automotive applicationsStefano Pietri, Chris Dao, Jehoda Refaeli, Alfredo Olmos, Xiaolei Wu. 41-44 [doi]
• An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoCChenchang Zhan, Wing-Hung Ki. 45-48 [doi]
• A low power high speed envelope detector for serial data systems in 45nm CMOSSumantra Seth, Rajavelu Thinakaran, Sujoy Chakravarty, Vikas Sinha. 49-52 [doi]
• Design optimization of an output capacitor-less low dropout regulator with compensation capcitance reduction and slew-rate enhancement techniqueEdward N. Y. Ho, Philip K. T. Mok. 53-56 [doi]
• A dense 45nm half-differential SRAM with lower minimum operating voltageGregory K. Chen, Michael Wieckowski, Daeyeon Kim, David Blaauw, Dennis Sylvester. 57-60 [doi]
• A subthreshold dynamic read SRAM (DRSRAM) based on dynamic stability criteriaRoghayeh Saeidi, Mohammad Sharifkhani, Khosro Hajsadeghi. 61-64 [doi]
• A novel technique to measure data retention voltage of large SRAM arraysFarah B. Yahya, Mohammad Mansour, Ali Chehab. 65-68 [doi]
• A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation schemeDaeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David Blaauw, Dennis Sylvester. 69-72 [doi]
• Efficient voltage conversion for SRAM low standby power modesLawrence T. Clark, Tai-Hua Chen, Vikas Chaudhary. 73-76 [doi]
• Simplified logic design methodology for fuzzy membership function based robust detection of maternal modulus maxima location: A low complexity Fetal ECG extraction architecture for mobile health monitoring systemsAmit Acharyya, Koushik Maharatna, Bashir M. Al-Hashimi, Hasitha Tudugalle. 77-80 [doi]
• A pseudo-online Brain-Computer Interface with automatic choice for EEG channel and frequencyAlessandro B. Benevides, Teodiano F. Bastos, Mário Sarcinelli Filho. 81-84 [doi]
• Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon predictionMichel Voyer, Sylvain-Robert Rivard, Luc Morin, Hung Tien Bui. 85-88 [doi]
• Noise reduction filters based on pointwise MAP for CT imagesRafael Jose Geraldo, Nelson D. A. Mascarenhas. 89-92 [doi]
• Image registration method for 2D representation of wireless Micro-Ball endoscopic imagesDan Wang, Xiang Xie, Guolin Li, Yingke Gu, Tianjia Sun, Zhihua Wang. 93-96 [doi]
• Perceptual image compression via adaptive block- based super-resolution directed down-samplingLin Ma, Songnan Li, King N. Ngan. 97-100 [doi]
• Browser-friendly hybrid codec for compound image compressionZhaotai Pan, Huifeng Shen, Yan Lu, Shipeng Li. 101-104 [doi]
• Highly parallel image coding for many coresXiulian Peng, Jizheng Xu, Feng Wu. 105-108 [doi]
• Efficient dictionary based video coding with reduced side informationJe-Won Kang, C. C. Jay Kuo, Robert A. Cohen, Anthony Vetro. 109-112 [doi]
• Multiple sub-pixel interpolation filters with adaptive symmetry for high-resolution video codingRun Cha, Oscar C. Au, Xingyu Zhang, Xing Wen, Jiali Li. 113-116 [doi]
• A new switch-mode noise-constrained transform domain NLMS adaptive filtering algorithmShing-Chow Chan, Yijing Chu, K. M. Tsui, Zhiguo Zhang. 117-120 [doi]
• A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithmPramod Kumar Meher, Megha Maheshwari. 121-124 [doi]
• An adaptive approach for contextual audio denoising using local Fisher informationAlexandre L. M. Levada, Débora C. Corrêa. 125-128 [doi]
• Enhanced adaptive playout scheduling and loss concealment techniques for Voice over IP networksDinei A. F. Florêncio, Li-wei He. 129-132 [doi]
• A new low complexity iterative equalization architecture for high-speed receivers on highly dispersive channels: Decision feedforward equalizer (DFFE)Ariel L. Pola, Diego E. Crivelli, Juan E. Cousseau, Oscar E. Agazzi, Mario Rafael Hueda. 133-136 [doi]
• "A MATLAB based optimum multiband FIR filters design program following the original idea of the Remez multiple exchange algorithm"Mohammad Ahsan, Tapio Saramäki. 137-140 [doi]
• Design of variable bandedge FIR filters with extremely large bandedge variation rangeYa Jun Yu. 141-144 [doi]
• Switching activity analysis and power estimation for multiple constant multiplier block of FIR filtersWen Bin Ye, Ya Jun Yu. 145-148 [doi]
• Successive approximation FIR filter designAlessandro J. S. Dutra, Lisandro Lovisolo, Eduardo A. B. da Silva, Paulo S. R. Diniz. 149-152 [doi]
• Multi-clock domain analysis and modeling of all-digital frequency synthesizersIoannis L. Syllaios, Poras T. Balsara. 153-156 [doi]
• MEMS-based all-digital frequency synthesis for ultralow-power radio for WBAN and WSN applicationsDavid Ruffieux, Matteo Contaldo, Christian C. Enz. 157-160 [doi]
• First order noise shaping in all digital PLLsFrancesco Brandonisio, Michael Peter Kennedy. 161-164 [doi]
• Jitter-Power minimization of digital frequency synthesis architecturesEric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta, Xiang Gao. 165-168 [doi]
• Use of time variant digital sigma-delta for fractional frequency synthesizersVictor R. Gonzalez-Diaz, Aldo Pena-Perez, Franco Maloberti. 169-172 [doi]
• A novel SST transmitter with mutually decoupled impedance self-calibration and equalizationShuai Chen, Liqiong Yang, Hua Jing, Feng Zhang, Zhuo Gao. 173-176 [doi]
• Design of high-speed clock recovery circuit for burst-mode applicationsSoojin Kim, Kyeongsoon Cho. 177-180 [doi]
• 250Mb/s to 3Gb/s unilateral continuous rate CDR using precise frequency detector and 1/5-rate linear phase detectorNguyen Thanh Trung, Philipp Hafliger. 181-184 [doi]
• A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuitFanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu. 185-188 [doi]
• An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operationMarcello Ganzerli, Luca Larcher, Simone Erba, Davide Sanzogni. 189-192 [doi]
• Slew-rate controlled 800Mbps transmitter in 65nm CMOSAnant S. Kamath, Vikas Sinha, Sujoy Chakravarty. 193-196 [doi]
• CMOS Envelope Tracking amplifier IC design for high-efficiency RF polar transmittersPo-Hsing Wu, Yan Li, Weibo Hu, Jerry Lopez, Donald Y. C. Lie, T. J. Liang. 197-200 [doi]
• Design of concurrent multi-band matching networksNagarjuna Nallam, Shouri Chatterjee. 201-204 [doi]
• Autonomous predistortion calibration of an RF power amplifierImran Bashir, Robert Bogdan Staszewski. 205-208 [doi]
• A Cartesian Feedback Feedforward TransmitterSungmin Ock, Jaegan Ko, Ranjit Gharpurey. 209-212 [doi]
• Low phase noise on-chip oscillator for implantable biomedical applicationsFatemeh Aghlmand, Seyed Mojtaba Atarodi, Saeed Saeedi. 213-216 [doi]
• On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theoryAndrea Bevilacqua, Pietro Andreani. 217-220 [doi]
• A phase-noise model for nonlinear piezoelectrically-actuated MEMS oscillatorsMauricio Pardo, Logan Sorenson, Farrokh Ayazi. 221-224 [doi]
• A regulated 3.1-10.6 GHz linear dual-tuning differential ring oscillator for UWB applicationsLi Lu, Changzhi Li, Jenshan Lin. 225-228 [doi]
• Supply noise insensitive ring VCO with on-chip adaptive bias-current and voltage-swing controlYoung-Seok Park, Woo-Young Choi. 229-232 [doi]
• A 14V-output adaptive-off-time boost converter with quasi-fixed-frequency in full loading rangeMing Chak Lee, Xiaocheng Jing, Philip K. T. Mok. 233-236 [doi]
• A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-loadChu-Hsiang Chia, Pui-Sun Lei, Robert Chen-Hao Chang. 237-240 [doi]
• Active-clamp ZVS two-switch flyback converterDakshina Murthy-Bellur, Marian K. Kazimierczuk. 241-244 [doi]
• Integrated SIMO DC-DC converter with on-line charge meter for adaptive PCCM operationYi Zhang, Dongsheng Ma. 245-248 [doi]
• Nonisolated high step-up stacked dc-dc converter based on boost converter elements for high power applicationMoises Tanca V., Ivo Barbi. 249-252 [doi]
• Comparator-based switched-capacitor pipelined ADC with background offset calibrationJi-Eun Jang. 253-256 [doi]
• An 11b pipeline ADC with dual sampling technique for converting multi-carrier signalsYu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund. 257-260 [doi]
• An energy-efficient 1MSps 7µW 11.9fJ/conversion step 7pJ/sample 10-bit SAR ADC in 90nmTaimur G. R. Kuntz, Cesar R. Rodrigues, Saeid Nooshabadi. 261-264 [doi]
• A deflection criterion for time-interleaved analog-to-digital convertersAndrew J. Bean, Andrew C. Singer. 265-268 [doi]
• SNR measurement based on linearity test for ADC BISTJingbo Duan, Degang Chen. 269-272 [doi]
• Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAsEdwin C. Becerra-Alvarez, José Manuel de la Rosa, Federico Sandoval Ibarra. 273-276 [doi]
• A low power UWB very low noise amplifier using an improved noise reduction techniqueMohammad Sadegh Mehrjoo, Mohammad Yavari. 277-280 [doi]
• A compact CMOS UWB LNA using tunable active inductors for WLAN interference rejectionMd. Mahbub Reja, Igor M. Filanovsky, Kambiz K. Moez. 281-284 [doi]
• Orthogonally tunable inductorless RF LNA for adaptive wireless systemsShreyas Sen, Marian Verhelst, Abhijit Chatterjee. 285-288 [doi]
• A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalanceMiguel A. Martins, Pui-In Mak, Rui Paulo Martins. 289-292 [doi]
• Versatile capabilities of digitally controlled integrated dc-dc convertersJing Wang, Wai Tung Ng, Olivier Trescases. 293-296 [doi]
• Ultra-fast hysteretic single-inductor-dual-output boost regulator with predictable noise spectrum and minimized cross-regulationXiaocheng Jing, Philip K. T. Mok. 297-300 [doi]
• Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifierEduard Alarcón, Daniel Fernández, Albert Garcia-Tormo, Jordi Madrenas, Alberto Poveda. 301-304 [doi]
• Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applicationsKa Nang Leung, Marco Ho, Jianping Guo, Pui Ying Or. 305-308 [doi]
• Harvesting circuits for miniaturized photovoltaic cellsRajiv Damodaran Prabha, Gabriel A. Rincón-Mora, Suhwan Kim. 309-312 [doi]
• A dual-loop delay locked loop with multi digital delay lines for GHz DRAMsJinyeong Moon, Hye-young Lee. 313-316 [doi]
• Fast parallel CRC & DBI calculation for high-speed memories: GDDR5 and DDR4Jinyeong Moon, Joong Sik Kih. 317-320 [doi]
• Complementary structure of memristive devices based passive memory arraysSangho Shin, Kyungmin Kim, Sung-Mo Kang. 321-324 [doi]
• A low-power dual-rail inputs write method for bit-interleaved memory cellsJunchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang. 325-328 [doi]
• Programming algorithms for multilevel phase-change memoryN. Papandreou, Haralampos Pozidis, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Evangelos Eleftheriou. 329-332 [doi]
• Blended engineering course - Electric Circuit Theory case studyJerzy Rutkowski, Katarzyna Moscinska. 333-336 [doi]
• Embedded web server for remote laboratory access for undergraduate students studying electronic engineeringEugene Otoakhia, Tanaporn Jenmanachaiyakun, Ahmad Afaneh, Said Alzebda, Mohammad Mani, Omar Sonbul, Alexander N. Kalashnikov. 337-340 [doi]
• Education of Digital and Analog Circuits supported by computer algebra systemJan Kyncl, Martin Novotny. 341-344 [doi]
• How to teach memristors in EE undergraduate coursesJordi Albo-Canals, Giovanni Egidio Pazienza. 345-348 [doi]
• Nullators and norators in circuits education: A benefit or an obstacle?Joos Vandewalle, Josef A. Nossek. 349-352 [doi]
• Distributed multi-camera object tracking with Bayesian InferenceJingjing Fan, Yanzhe Xin, Fenglin Dai, Bo Hu, Jianqiu Zhang, Qiyong Lu, Jun He. 357-360 [doi]
• A new network-based algorithm for multi-camera abnormal activity detectionHongyu Gao, Weiyao Lin, Xiaokang Yang, Hongxiang Li, Ning Xu, Jun Xie, Yan Li. 361-364 [doi]
• Stereoscopic learning for disparity estimationZhebin Zhang, Yizhou Wang, Tingting Jiang, Wen Gao. 365-368 [doi]
• On the Cramér-Rao bound of autoregressive estimation in noiseLuis Weruaga, O. Michael Melko. 373-376 [doi]
• DOA estimation of coherent signals for uniform linear arrays with mutual couplingB. Liao, S. C. Chan. 377-380 [doi]
• An improved model of jitter effects in analog-to-digital conversionDiego Bellan. 381-384 [doi]
• Distributed Kalman Filter using fast polynomial filterAhmed Abdelgawad, Magdy A. Bayoumi. 385-389 [doi]
• Minimum redundancy linear sparse subarrays for direction of arrival estimation without ambiguityJian-Feng Gu, Wei-Ping Zhu, M. N. S. Swamy. 390-393 [doi]
• An Improved method for the design of variable fractional-delay IIR digital filtersSoo-Chang Pei, Jong-Jy Shyu, Cheng-Han Chan, Yun-Da Huang. 394-397 [doi]
• Minimax design of stable IIR filters with sparse coefficientsWu-Sheng Lu, Takao Hinamoto. 398-401 [doi]
• A spectrum sensing method based on stratified samplingBashar I. Ahmad, Andrzej Tarczynski. 402-405 [doi]
• Efficient coefficient partitioning for decomposed DA-based inner-product computationYu Pan, Pramod Kumar Meher. 406-409 [doi]
• Optimization and implementation of continuous time DSP-systems by using granularity reductionDieter Brückmann, Tobias Feldengut, Bedrich J. Hosticka, Rainer Kokozinski, Karsten Konrad, Nima Tavangaran. 410-413 [doi]
• Digital frequency synthesizer using adaptive mode-coupled resonator mechanism for low phase noise and low jitter applicationsUlrich L. Rohde, Ajay K. Poddar. 414-417 [doi]
• Multipath adaptive cancellation of divider non-linearity in fractional-N PLLsCarlo Samori, Marco Zanuso, Salvatore Levantino, Andrea L. Lacaita. 418-421 [doi]
• Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directionsPaul P. Sotiriadis. 422-425 [doi]
• All-digital RF frequency modulationRobert Bogdan Staszewski. 426-429 [doi]
• A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradationWon Young Lee, Lee-Sup Kim. 430-433 [doi]
• A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systemsChua-Chin Wang, Chih-Lin Chen, Tai-Hao Yeh, Yi Hu, Gang-Neng Sung. 434-437 [doi]
• High-speed and low complexity carrier recovery for DP-QPSK transmissionJea Hack Lee, Myung Hoon Sunwoo. 438-441 [doi]
• Low complexity baseband transceiver design for narrow band power line communicationYin-Tsung Hwang, Feng-Ming Chang, Shin-Wen Chen. 442-445 [doi]
• A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization techniqueArash Zargaran-Yazd, Shahriar Mirabbasi, Res Saleh. 446-449 [doi]
• A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitterSandeep D Souza, Frank Chang, Sudhakar Pamarti, Bipul Agarwal, Hossein Zarei, Tirdad Sowlati, Roc Berenguer. 450-453 [doi]
• MDFT filter bank multicarrier systems with multiple transmission zerosFernando Cruz-Roldán, Manuel Blanco-Velasco, Juan Ignacio Godino-Llorente. 454-457 [doi]
• All digital time tracking loop for DVB-H and DVB-TMohamed Mohi, Ahmed F. Shalash. 458-461 [doi]
• A channel estimation scheme for Chinese DTTB system combating long echo and high doppler shiftYizhi Wang, Yun Chen, Yunlong Ge, Huxiong Xu, Xiaoyang Zeng. 462-465 [doi]
• Improved matching pursuit algorithm and architecture for LTE Channel EstimationJohan Löfgren, Ove Edfors, Peter Nilsson. 466-469 [doi]
• A band-reject nested-PLL phase-noise reduction scheme for clock-cleanersMauricio Pardo, Farrokh Ayazi. 470-473 [doi]
• A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aidZhuo Zhang, Woogeun Rhee, Zhihua Wang. 474-477 [doi]
• Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise suppression in fractional-N PLLsXiaoming Liu, Jing Jin, Xi Li, Jianjun Zhou. 478-481 [doi]
• A new frequency synthesizers stabilization method based on a mixed Phase Locked Loop and Delay Locked Loop architectureP. O. Lucas de Peslouan, Cédric Majek, Thierry Taris, Yann Deval, Didier Belot, Jean-Baptiste Begueret. 482-485 [doi]
• All digital phase-locked loop using active inductor oscillator and novel locking algorithmTzu-Chi Huang, Hong-Yi Huang, Jen-Chieh Liu, Kuo-Hsing Cheng, Ching-Hsing Luo. 486-489 [doi]
• A common grounded Z-source buck-boost converterMasato Asano, Daiki Abe, Hirotaka Koizumi. 490-493 [doi]
• Switch bootstrapping technique for voltage doublers and double charge pumpsYounis Allasasmeh, Stefano Gregori. 494-497 [doi]
• Study and implementation of high frequency pulse LED driver with self-oscillating circuitYu-Sheng Chen, Tsorng-Juu Liang, Kai-Hui Chen, Jer-Nan Juang. 498-501 [doi]
• Cost efficient mains powered supply concepts for wireless sensor nodesFranz Lukasch. 502-505 [doi]
• A fully integrated wide-band PID controller with capacitor-less compensation for step-down DC-DC converterHyun Hee Park, Young-Jin Woo, Gyu-Hyeong Cho. 506-509 [doi]
• A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOSLiyuan Liu, Dongmei Li, Liangdong Chen, Yafei Ye, Zhihua Wang. 510-513 [doi]
• Analysis of random capacitor mismatch errors in pipeline analog-to-digital convertersGholamreza Nikandish, Ali Medi. 514-517 [doi]
• A 40-nm 640-µm:::2::: 45-dB opampless all-digital second-order MASH ΔΣ ADCToshihiro Konishi, Hyeokjong Lee, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi. 518-521 [doi]
• An incremental sigma delta converter for compressive sensing applicationsHsuan-Tsung Wang, Walter D. Leon-Salas. 522-525 [doi]
• The inconvenient truth about alias rejection in continuous time ΔΣ convertersShanthi Pavan. 526-529 [doi]
• A 65nm CMOS current-mode receiver front-endS. Rodriguez, A. Rusu. 530-533 [doi]
• A 2.4µW Wake-up Receiver for wireless sensor nodes with -71dBm sensitivityChristian Hambeck, Stefan Mahlknecht, Thomas Herndl. 534-537 [doi]
• A 2-pin input multi frequency power scavenging unit for wireless sensor nodes and RFID tagsHannes Reinisch, Stefan Gruber, Hartwig Unterassinger, Martin Wiessflecker, Günter Hofer, Wolfgang Pribyl, Gerald Holweg. 538-541 [doi]
• Adaptive calibration of IIP2 in direct down-conversion mixers with modified LMS algorithmZhijian Lu, Peichen Jiang, Tingting Mo, Jianjun Zhou. 542-545 [doi]
• An ISM 2.4 GHz low-IF receiver frontendAndre Esteves, Jose Dores, Pedro Matos, Miguel A. Martins, Jorge R. Fernandes. 546-549 [doi]
• Variable-duty-cycle scheduling in double-edge-triggered flip-flop-based high-level synthesisKeisuke Inoue, Mineo Kaneko. 550-553 [doi]
• TG Master-Slave FFs: High-speed optimizationElio Consoli, Gaetano Palumbo, Melita Pennisi. 554-557 [doi]
• A clock gated flip-flop for low power applications in 90 nm CMOSMohamed O. Shaker, Magdy A. Bayoumi. 558-562 [doi]
• DET FF topologies: A detailed investigation in the energy-delay-area domainMassimo Alioto, Elio Consoli, Gaetano Palumbo. 563-566 [doi]
• Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodesGeorgios N. Selimis, Mario Konijnenburg, Maryam Ashouei, Jos Huisken, Harmke de Groot, Vincent van der Leest, Geert Jan Schrijen, Marten van Hulst, Pim Tuyls. 567-570 [doi]
• Power-aware design with various low-power algorithms for an H.264/AVC encoderHyun Kim, Chae-Eun Rhee, Jin-Sung Kim, Sunwoong Kim, Hyuk-Jae Lee. 571-574 [doi]
• Area-efficient fast scheduling schemes for MVC prediction architectureMinsu Choi, Jinsang Kim, Won-Kyung Cho, Jinwook Burm. 575-578 [doi]
• A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080pCláudio Machado Diniz, Bruno Zatt, Cristiano Thiele, Altamiro Amadeu Susin, Sergio Bampi, Felipe Sampaio, Daniel Palomino, Luciano Volcan Agostini. 579-582 [doi]
• A multilevel data reuse scheme for Motion Estimation and its VLSI designMateus Grellert, Felipe Sampaio, Júlio C. B. Mattos, Luciano Volcan Agostini. 583-586 [doi]
• An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devicesVinucius S. Livramento, Bruno G. Moraes, Brunno A. Machado, José Luís Güntzel. 587-590 [doi]
• ISCAS 2011 special sessions on education innovations and experiencesJoos Vandewalle, Babak Ayazifar. 591-594 [doi]
• Analysis of assessment using signals, systems concept inventory for systems coursesTokunbo Ogunfunmi. 595-598 [doi]
• Rethinking Fourier s legacy in signals and systems educationBabak Ayazifar. 599-602 [doi]
• On the relation of circuit theory and signals, systems and communicationsJosef A. Nossek, Michel T. Ivrlac. 603-604 [doi]
• Interactive lecturing techniquesRaija Lehto. 605-608 [doi]
• Fast mode decision by using probabilities from arithmetic coderYou Zhou, Minghu Jiang, Feng Wu. 609-612 [doi]
• Enhanced line-based intra prediction with fixed interpolation filteringLi Zhang 0006, Siwei Ma, Wen Gao, Xin Zhao. 613-616 [doi]
• Integration of Plane Mode with Multiple Predictor Sets in Intra Prediction for video codingGuichun Li, Lingzhi Liu, Nam Ling, Jianhua Zheng, Philipp Zhang. 617-620 [doi]
• Mode-dependent fast separable KLT for block-based intra codingChuohao Yeo, Yih Han Tan, Zhengguo Li, Susanto Rahardja. 621-624 [doi]
• A deadline-aware virtual contention free EDCA scheme for H.264 video over IEEE 802.11e wireless networksQian Liu, Zixuan Zou, Chang Wen Chen. 625-628 [doi]
• A Unitary ESPRIT algorithm for carrier frequency offset estimationTadeu N. Ferreira, Sergio L. Netto, Paulo S. R. Diniz. 629-632 [doi]
• Subband blind source separation considering acoustic reverberation characteristicsPaulo B. Batalheiro, Mariane Rembold Petraglia, Diego B. Haddad. 633-636 [doi]
• An improved method for blind separation of complex-valued signals via joint diagonalizationXianfeng Xu, Da-Zheng Feng, Wei Xing Zheng. 637-640 [doi]
• Signal recovery in PDM optical communication systems employing independent component analysisE. S. Rosa, Leonardo Tomazeli Duarte, João Marcos Travassos Romano, Ricardo Suyama. 641-644 [doi]
• A blind technique for total interference rejectionRuey-Wen Liu, Xu Wang, Fan He, Tao Yang, Bo Hu. 645-648 [doi]
• FPGA implementation of a spiking neural network for pattern matchingLouis-Charles Caron, Frederic Mailhot, Jean Rouat. 649-652 [doi]
• Combining ISA extensions and subsetting for improved ASIP performance and costSimon Rajotte, Diana Carolina Gil, J. M. Pierre Langlois. 653-656 [doi]
• Bit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGAMathias Faust, Chip-Hong Chang. 657-660 [doi]
• Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAsSyed Asad Alam, Oscar Gustafsson. 661-664 [doi]
• Asynchronous-QDI 2D IIR digital filter circuitsNilanka T. Rajapaksha, Arjuna Madanayake. 665-668 [doi]
• Maximum likelihood parameter estimation of a spiking silicon neuronAlexander Russell, Ralph Etienne-Cummings. 669-672 [doi]
• A combinational digital logic approach to STDPAndrew Cassidy, Andreas G. Andreou, Julius Georgiou. 673-676 [doi]
• Mismatch reduction through dendritic nonlinearities in a 2D silicon dendritic neuron arrayYingxue Wang, Shih-Chii Liu. 677-680 [doi]
• An in-silico glial microdomain to invoke excitability in cortical neural networksJonathan Joshi, Alice C. Parker, Ko-Chung Tseng. 681-684 [doi]
• The time machine: A novel spike-based computation architectureVaibhav Garg, Ravi Shekhar, John G. Harris. 685-688 [doi]
• Detecting multi-mode MIMO signals: Algorithm and architecture designLiang Liu, Peter Nilsson. 689-692 [doi]
• Scalar quantizer based feedback of the Channel Direction Information in MU-MISO systemsIsraa Slim, Amine Mezghani, Josef A. Nossek. 693-696 [doi]
• Performance analysis of lattice-reduction algorithms for a novel LR-compatible K-Best MIMO detectorAmeer Youssef, Mahdi Shabany, P. Glenn Gulak. 701-704 [doi]
• FPGA implementation of channel estimation for MIMO-OFDMJeoong Sung Park, Tokunbo Ogunfunmi. 705-708 [doi]
• A new algorithm for double scalar multiplication over Koblitz curvesJithra Adikari, Vassil S. Dimitrov, Renato J. Cintra. 709-712 [doi]
• A dual-field elliptic curve cryptographic processor with a radix-4 unified division unitYao-Lin Chen, Jen-Wei Lee, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee. 713-716 [doi]
• A maximal entropy digital chaotic circuitAlan J. Michaels. 717-720 [doi]
• Counteracting power analysis attack using Static Single-ended LogicAmir Khatib Zadeh, Catherine H. Gebotys, Shahab Ardalan. 721-724 [doi]
• An oscillator-based true random number generator with jitter amplifierTakehiko Amaki, Masanori Hashimoto, Takao Onoye. 725-728 [doi]
• Synchronization of the Kuramoto model with multi-scale-free propertyJin Fan. 729-732 [doi]
• Synchronization of bounded piecewise smooth systemsMario di Bernardo, Franco Garofalo, Davide Liuzza. 733-736 [doi]
• Master Stability Function for networks of Chua s circuits with static and dynamic couplingsMarco Righero, Fernando Corinto, Mario Biey. 737-740 [doi]
• Synchronization of networks of non-identical Chua circuits: Analysis and experimentsMassimiliano de Magistris, Mario di Bernardo, Edmondo Di Tucci, Sabato Manfredi. 741-744 [doi]
• Synchronizing coupled oscillators in polygonal networks with frustrationYoko Uwate, Yoshifumi Nishio. 745-748 [doi]
• Power conversion efficiency of class-E power amplifier outside nominal operationTomoharu Nagashima, Xiuqin Wei, Hiroo Sekiya, Marian K. Kazimierczuk. 749-752 [doi]
• Reduction of equivalent series inductor effect in constant on- time control DC-DC converter without ESR compensationYu-Huei Lee, Wang-Wei Lai, Wan-Yu Pai, Ke-Horng Chen, Ming-Jhe Du, Shih-Hsien Cheng. 753-756 [doi]
• A 80V output voltage boost converter with low voltage ripple for Avalanche Photodiode(APD)Yao-Yi Yang, Chun-Yu Hsieh, Tzu-Chi Huang, Yu-Huei Lee, Shih-Wei Wang, Ming-Yan Fan, Ming-Jhe Du, Shih-Hsien Cheng, Ke-Horng Chen. 757-760 [doi]
• Single controller current balance (SCCB) technique for voltage-mode multi-phase buck converterYu-Ping Huang, Yi-Ping Su, Yu-Huei Lee, Kuan-Yu Chu, Chun-Jen Shih, Ke-Horng Chen, Ming-Jhe Du, Shih-Hsien Cheng. 761-764 [doi]
• Assessment of direct VRM topologiesUrsula Ribes-Mallada, Ramon Leyva, Pedro Garces. 765-768 [doi]
• Software based separation of amplitude and phase noises in time domainJanos Ladvanszky, Gábor Kovács. 769-772 [doi]
• Verilog-A modeling of SPAD statistical phenomenaGianluca Giustolisi, Rosario Mita, Gaetano Palumbo. 773-776 [doi]
• Design and analysis of fuzzy logic based robust PID controller for PWM-based switching converterGhulam Abbas, Nacer Abouchi, Awais Sani, Cyril Condemine. 777-780 [doi]
• A novel operating-point driven method for the sizing of analog ICBo Liu, Murat Pak, Xuezhi Zheng, Georges G. E. Gielen. 781-784 [doi]
• Comparative analysis of information rates of simple amplifier topologiesNicole McFarlane, Pamela Abshire. 785-788 [doi]
• Photocurrent dependent response of a SPAD biased by a charge pumpMohammed Al-Rawhani, David R. S. Cumming, Danial Chitnis, Steve Collins. 789-792 [doi]
• Current Mode Feed-Forward Gain Control for 0.8V CMOS hearing aidFanyang Li, Haigang Yang, Yu Wang, Qisong Wu. 793-796 [doi]
• Bio-inspired nano-photodiode for Low Light, High Resolution and crosstalk-free CMOS image sensingFaycal Saffih, Nathaniel N. Fitzpatrick, Mohammad A. Mohammad, Stephane Evoy, Bo Cui. 797-800 [doi]
• A low power independent component analysis processor in 90nm CMOS technology for portable EEG signal processing systemsChiu-Kuo Chen, Yi-Yuan Wang, Zong-Han Hsieh, Ericson Chua, Wai-Chi Fang, Tzyy-Ping Jung. 801-804 [doi]
• Compressed sensing reconstruction: Comparative study with applications to ECG bio-signalsAnna M. R. Dixon, Emily G. Allstot, Andrew Y. Chen, Daibashish Gangopadhyay, David J. Allstot. 805-808 [doi]
• A multiparametric biosensor array for on-chip cell culture with feedback controlled microfluidicsDavid Welch, Jennifer Blain Christen. 809-812 [doi]
• A high voltage battery charger with smooth charge mode transition in BCD processShang-Hsien Yang, Jen-Wei Liu, Yi-Hong Wu, Deng-Sian Wang, Chua-Chin Wang. 813-816 [doi]
• Bonding-wire triangular spiral inductor for on-chip switching power convertersGerard Villar, Julia Delos, Eduard Alarcón. 817-820 [doi]
• Meshing strategy of equivalent substrate schematic in SMART power ICFabrizio Lo Conte, Jean-Michel Sallese, Maher Kayal. 821-824 [doi]
• A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC convertersLoai G. Salem, Rinkle Jain. 825-828 [doi]
• A 300mV Low-voltage start-up circuit for energy harvesting systemsEdgardo Mendez-Delgado, Guillermo J. Serrano. 829-832 [doi]
• A semi-static threshold-triggered delay element for low power applicationsLouis H. Jung, Torsten Lehmann, Gregg J. Suaning, Nigel H. Lovell. 833-836 [doi]
• Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chainS. M. Yasser Sherazi, Peter Nilsson, Omer Can Akgun, Henrik Sjöland, Joachim Neves Rodrigues. 837-840 [doi]
• A low-power 8-bit SAR ADC for a QCIF image sensorRecep Ozgun, Joseph H. Lin, Francisco Tejada, Philippe O. Pouliquen, Andreas G. Andreou. 841-844 [doi]
• Improve accuracy of delay element by filtering false path for low power desychronized circuitsJun Xu, Xiangku Li. 845-848 [doi]
• Comparative analysis of contrast enhancement algorithms in surveillance imagingDiana Carolina Gil, Rana Farah, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau, Yvon Savaria. 849-852 [doi]
• A FPGA based fast runtime reconfigurable real-time Multi-Object-TrackerMatthias Rummele-Werner, Thomas Perschke, Lars Braun, Michael Hübner, Jürgen Becker. 853-856 [doi]
• Auto-generated strokes for motion segmentationZhiqiang Tian, Jianru Xue, Ce Li, Xuguang Lan, Nanning Zheng. 857-860 [doi]
• An efficient image interpolation algorithm based upon the switching and self learned characteristics for natural imagesSunil Prasad Jaiswal, Vinit Jakhetiya, Anil Kumar Tiwari. 861-864 [doi]
• A neuromorphic cross-correlation chipTara Julia Hamilton, Jonathan Tapson. 865-868 [doi]
• A programmable axonal propagation delay circuit for time-delay spiking neural networksRunchun Wang, Craig T. Jin, Alistair McEwan, André van Schaik. 869-872 [doi]
• Systematic configuration and automatic tuning of neuromorphic systemsSadique Sheik, Fabio Stefanini, Emre Neftci, Elisabetta Chicca, Giacomo Indiveri. 873-876 [doi]
• Analogue CMOS circuit implementation of a dopamine modulated synapseJayawan H. B. Wijekoon, Piotr Dudek. 877-880 [doi]
• An improved FPGA implementation of CNN Gabor-type filtersEvren Cesur, Nerhun Yildiz, Vedat Tavsanoglu. 881-884 [doi]
• Simple improvement stage for low voltage WTA and Rank Order circuitsJesus E. Molinar-Solis, Rodolfo Garcia-Lozano, Alejandra Morales-Ramirez, Jaime Ramírez-Angulo. 885-888 [doi]
• All-CMOS subbandgap reference circuit operating at low supply voltageYi Yang, David M. Binkley, Lu Li, Changzhan Gu, Changzhi Li. 893-896 [doi]
• Energy harvesting circuit using integrated transformerHugo B. Goncalves, Miguel A. Martins, Jorge R. Fernandes. 897-900 [doi]
• A sub-1V CMOS voltage reference generatorShadi M. Harb, William R. Eisenstadt, Robert M. Fox. 901-904 [doi]
• Fast transient response capacitor-free linear voltage regulator in 65nm CMOSThomas Jackum, Gerhard Maderbacher, Wolfgang Pribyl, Roman Riederer. 905-908 [doi]
• Novel MIMO 4-DOF position control for Capsule EndoscopeIbrahim K. Mohammed, Bayan S. Sharif, Jeffrey A. Neasham, Damian Giaouris. 909-912 [doi]
• Channel characterization for implant to body surface communicationAwais M. Kamboh, Andrew J. Mason. 913-916 [doi]
• Duty Cycle Shift Keying data transfer technique for bio-implantable devicesSeyed Abdollah Mirbozorgi, Ghazal Nabovati, Mohammad Maymandi-Nejad. 917-920 [doi]
• Channel characterization for galvanic coupled in vivo biomedical devicesChun-ming Tang, Rizwan Bashirullah. 921-924 [doi]
• Comparison of digital LQR techniques for DC-DC boost converters with large load rangeFabricio Hoff Dupont, Vinicius Foletto Montagner, Jose Renes Pinheiro, Humberto Pinheiro, Sergio Vidal Garcia Oliveira, Adriano Peres. 925-928 [doi]
• Delta-sigma buck converter - A design exploration for GSM Wireless systemsKamala Hariharan, Susan Luschas, Shoba Krishnan. 929-932 [doi]
• Current-mode synthetic control (CSC) technique for high efficiency DC-DC boost converters over a wide load rangeYi-Ping Su, Yi-Chun Chen, Han-Hsiang Huang, Yu-Huei Lee, Yao-Yi Yang, Ke-Horng Chen, Ming-Jhe Du, Shih-Hsien Cheng. 933-936 [doi]
• Electrical characteristics of novel ESD protection devices for I/O and power clampYong-Seo Koo, Kwang-Yeob Lee, Joong-Ho Choi, Chan-Ho Lee, Yoon-Sik Lee, Yil Suk Yang. 937-940 [doi]
• P:::2:::E-DWT: A parallel and pipelined efficient VLSI architecture of 2-D Discrete Wavelet TransformMilad Ghantous, Magdy Bayoumi. 941-944 [doi]
• A parallel and area-efficient architecture for deblocking filter and Adaptive Loop FilterJuan Du, Lu Yu. 945-948 [doi]
• TV energy management by camera-based viewer monitoringChoong Geun Lee, Vasily G. Moshnyaga. 949-952 [doi]
• Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIPHee Kwan Eun, Sung Jo Hwang, Myung Hoon Sunwoo, Young-Hwan Kim, Hi-Seok Kim. 953-956 [doi]
• Novel fractional motion estimation algorithm and architecture using Sub-block CombinationUn Seob Kim, Shin Wang Ho, Myung Hoon Sunwoo. 957-960 [doi]
• Antenna-array 2D-IIR digital filters for carrier-modulated frequency-agile and cognitive wireless systemsArjuna Madanayake, Hamid-Reza Bahrami, Leonard T. Bruton. 961-964 [doi]
• Spurious emissions reduction using multirate RF transmitterArnaud Werquin, Antoine Frappe, Andreas Kaiser. 965-968 [doi]
• Design and parallel implementation of an adaptive baseline wander compensator for high-speed optical coherent receiversGabriel N. Maggio, Mario R. Hueda. 969-972 [doi]
• A convex optimization approach to reducing peak-to-average-power ratio in OFDMNeil Jacklin, Zhi Ding. 973-976 [doi]
• MEMS with Σ - Δ type of feedback loop control as an iterative mapMathieu Pladys, Elena Blokhina. 977-980 [doi]
• A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOSChang-Ming Lai, Meng-Hung Shen, Yi-Da Wu, Kai-Hsiang Huang, Po-Chiun Huang. 981-984 [doi]
• Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisitionXiaoming Liu, Jing Jin, Cui Mao, Jianjun Zhou. 985-988 [doi]
• Linearization of ADCs via digital post processingYang Yang, Ali Motafakker-Fard, Bahram Jalali. 989-992 [doi]
• A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°CZhenqi Chen, Fa Foster Dai. 997-1000 [doi]
• Design and analysis of a switched-capacitor-based peak detectorMing Zhang, Nicolas Llaser, Hervé Mathias. 1001-1004 [doi]
• A distributed amplifier based dispersive delay lineBo Xiang, Alyssa B. Apsel. 1005-1008 [doi]
• A Temperature-stable 60-dB programmable-gain amplifier in 0.13-µm CMOSXiaolang Zhang, Shahriar Mirabbasi, Lutz H.-J. Lampe. 1009-1012 [doi]
• A physiological valence/arousal model from musical rhythm to heart rhythmHui Min Wang, Yaw-Chern Lee, Brad S. Yen, Chun-Yen Wang, Sheng-Chieh Huang, Kea-Tiong Tang. 1013-1016 [doi]
• CMOS low current measurement system for biomedical applicationsBrian Goldstein, Dongsoo Kim, Angelo Rottigni, Jian Xu, T. Kyle Vanderlick, Eugenio Culurciello. 1017-1020 [doi]
• A novel method to count the red blood cells in thin blood filmsS. Kareem, Richard C. S. Morling, Izzet Kale. 1021-1024 [doi]
• Classification of brain MRI using the LH and HL wavelet transform sub-bandsSalim Lahmiri, Mounir Boukadoum. 1025-1028 [doi]
• Active noise cancellation of motion artifacts in pulse oximetry using isobestic wavelength light sourceChun-Yen Wang, Kea-Tiong Tang. 1029-1032 [doi]
• Quasi-analytical spectrum of PWM signals with dead-time for multiple sinusoidal inputFernando Chierchie, Eduardo E. Paolini. 1033-1036 [doi]
• Application of probabilistic Tabu Search to distribution system service restorationHiroyuki Mori, Takayuki Muroi. 1037-1040 [doi]
• Nonlinear control evaluation of two-stage matrix converter using ideal and non-ideal IGBT ModelsJ. Alexis Andrade-Romero, Jesus Franklin Andrade, Marat Rafikov. 1041-1044 [doi]
• What is the importance of selecting features for non-technical losses identification?Caio C. O. Ramos, João Paulo Papa, Andre N. Souza, Giovani Chiachia, Alexandre X. Falcão. 1045-1048 [doi]
• Towards optimal CMOS lifetime via unified reliability modeling and multi-objective optimizationAgathoklis Papadopoulos, Theocharis Theocharides, Maria K. Michael. 1049-1052 [doi]
• Nonspeculative decimal signed digit adderLiu Han, Dongdong Chen, Khan A. Wahid, Seok-Bum Ko. 1053-1056 [doi]
• Spatial- and temporal-reliability aware design for nano-scale VLSI circuitsMd. Sajjad Rahaman, Qing Duan, Masud H. Chowdhury. 1057-1060 [doi]
• Multiplier structures for low power applications in deep-CMOSDursun Baran, Mustafa Aktan, Vojin G. Oklobdzija. 1061-1064 [doi]
• An improved model for delay/energy estimation in near-threshold flip-flopsSagi Fisher, Raz Dagan, Sagi Blonder, Alexander Fish. 1065-1068 [doi]
• Low complexity block-based unbiased frequency estimationGustavo Gonzalez, Fernando H. Gregorio, Juan E. Cousseau. 1069-1072 [doi]
• Bi-criterion optimization of non-uniform filter banks for acoustic echo cancellationRajeev C. Nongpiur, Dale J. Shpak. 1073-1076 [doi]
• Edge detection using histogram equalization and multi-filtering processZohaib Hameed, Chunyan Wang. 1077-1080 [doi]
• Implementation of a motion sickness evaluation system based on EEG spectrum analysisChun-Shu Wei, Shang-Wen Chuang, Wan-Ru Wang, Li-Wei Ko, Tzyy-Ping Jung, Chin-Teng Lin. 1081-1084 [doi]
• A one-layer recurrent neural network for constrained single-ratio linear fractional programmingQingshan Liu, Jun Wang. 1089-1092 [doi]
• Recurrent neural network as a KWTA selector: A synthesis procedureRuxandra L. Costea, Corneliu A. Marinov. 1093-1096 [doi]
• GPS offset estimation and correction using satellite constellation informationVincenzo Manzoni, Andrea Corti, Alessandro Rossi, Stefano Tissino, Sergio M. Savaresi. 1097-1100 [doi]
• Prototype rotation based assisted image analysis for 3D vision systemAri Paasio. 1101-1104 [doi]
• Prediction of core losses on a three-phase transformer using neural networksKleymilson N. Souza, Thiago N. de Castro, Thiago M. Pereira, Ricardo S. T. Pontes, Arthur P. S. Braga. 1105-1108 [doi]
• A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOSHussein Fakhoury, Chadi Jabbour, Hasham Khushk, Van Tam Nguyen, Patrick Loumeau. 1109-1112 [doi]
• Sine-shaping mixer for continuous-time ΣΔ ADCsAhmed Ashry, Hassan Aboushady. 1113-1116 [doi]
• A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADCChang-Seob Shin, Min-Ho Yoon, Kang-Il Cho, Young-Ju Kim, Kwang-Soo Kim, Seung-Hoon Lee, Gil-Cho Ahn. 1117-1120 [doi]
• High-order continuous-time incremental ΣΔ ADC for multi-channel applicationsJulian Garcia, Ana Rusu. 1121-1124 [doi]
• A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiverChadi Jabbour, Hasham Khushk, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau. 1125-1128 [doi]
• Requirement driven low-power LC and ring oscillator designMaarten Lont, Dusan M. Milosevic, Arthur H. M. van Roermund, Guido Dolmans. 1129-1132 [doi]
• A 1 mW low phase-noise relaxation oscillatorJoao Casaleiro, Hugo Lopes, Luís Bica Oliveira, Jorge R. Fernandes, Manuel M. Silva. 1133-1136 [doi]
• A 3.125 GHz four stage voltage controlled ring oscillator in 0.18 CMOSCarlis Sanchez-Azqueta, Santiago Celma, Francisco Aznar. 1137-1140 [doi]
• A 27-GHz low-power push-push LC VCO with wide tuning range in 65nm CMOSReza Molavi, Shahriar Mirabbasi, Hormoz Djahanshahi. 1141-1144 [doi]
• A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radioJin Zhou, Wei Li, Deping Huang, Chen Lian, Ning Li, Junyan Ren. 1145-1148 [doi]
• Confession session: Learning from others mistakesPamela Abshire, Amine Bermak, Raphael Berner, Gert Cauwenberghs, Shoushun Chen, Jennifer Blain Christen, Timothy G. Constandinou, Eugenio Culurciello, Marc Dandin, Timir Datta, Tobi Delbrück, Piotr Dudek, Amir Eftekhar, Ralph Etienne-Cummings, Giacomo Indiveri, Matthew K. Law, Bernabé Linares-Barranco, Jonathan Tapson, Wei Tang, Yiming Zhai. 1149-1162 [doi]
• A simple radix-4 Booth encoded modulo 2:::n:::+1 multiplierRamya Muralidharan, Chip-Hong Chang. 1163-1166 [doi]
• A RNS Montgomery multiplication architectureDimitrios M. Schinianakis, Thanos Stouraitis. 1167-1170 [doi]
• A low-energy hybrid radix-4/-8 multiplier for portable multimedia applicationsGyeonghoon Kim, Seungjin Lee, Junyoung Park, Hoi-Jun Yoo. 1171-1174 [doi]
• A 145µW 8×8 parallel multiplier based on optimized bypassing architectureSunjoo Hong, Taehwan Roh, Hoi-Jun Yoo. 1175-1178 [doi]
• A recursive-divide architecture for multiplication and divisionJames E. Stine, Amey Phadke, Surpriya Tike. 1179-1182 [doi]
• Learning to Conceive, Design, Implement and Operate Circuits and SystemsEduard Alarcón, Ramon Bragós, Elisa Sayrol. 1183-1186 [doi]
• Teaching circuits to new generations of engineersLjiljana Trajkovic. 1187-1190 [doi]
• An online adaptive tutoring system for design-centric coursesYong Lian. 1191-1194 [doi]
• Circuits and systems engineering education through interdisciplinary team-based design projectsWim Dehaene, Georges G. E. Gielen, Geert Deconinck, Johan Driesen, Marc Moonen, Bart Nauwelaers, C. Van Hoof, Patrick Wambacq. 1195-1198 [doi]
• An introductory capstone design course on embedded systemsJeff C. Jensen, Edward A. Lee, Sanjit A. Seshia. 1199-1202 [doi]
• Floorplanning driven Network-on-Chip synthesis for 3-D SoCsWei Zhong, Song Chen, Fei Ma, Takeshi Yoshimura, Satoshi Goto. 1203-1206 [doi]
• A unified optimization framework for simultaneous gate sizing and placement under density constraintsJason Cong, John Lee, Guojie Luo. 1207-1210 [doi]
• A hierarchical 3-D floorplanning algorithm for many-core CMP networksSachhidh Kannan, Garrett S. Rose. 1211-1214 [doi]
• Distributed LC resonant clock tree synthesisMatthew R. Guthaus. 1215-1218 [doi]
• Register On MEsh (ROME): A novel approach for clock mesh network synthesisJianchao Lu, Yusuf Aksehir, Baris Taskin. 1219-1222 [doi]
• Reconfigurable inverse transform architecture for multiple purpose video codingTsung-Yuan Huang, He-Yuan Lin, Chun-Fu Chen, Gwo Giun Lee. 1223-1226 [doi]
• A learning-based video compression on low-quality data by unscented kalman filters with Gaussian process regressionHongkai Xiong, Zhe Yuan, Yuan F. Zheng. 1227-1230 [doi]
• Frame-level quantization control for perceptual quality constrained H.264/AVC video codingZhenzhong Chen, Yap-Peng Tan. 1231-1234 [doi]
• Blind PSNR estimation using shifted blocks for JPEG imagesGao Yang, Yap-Peng Tan. 1235-1238 [doi]
• Estimating relative objective quality among images compressed from the same originalGao Yang, Ci Wang, Yap-Peng Tan. 1239-1242 [doi]
• Roesser model realization of MIMO n-D systems by elementary operationsLi Xu, Shi Yan, Shin-ya Matsushita, Zhiping Lin. 1243-1246 [doi]
• Algebraic integer based 8×8 2-D DCT architecture for digital video processingArjuna Madanayake, Renato J. Cintra, Denis Onen, Vassil S. Dimitrov, Leonard T. Bruton. 1247-1250 [doi]
• Clock jitter estimation in noiseZaid J. Towfic, Ali H. Sayed. 1251-1254 [doi]
• FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engineHanan M. Hassan, Ahmed F. Shalash, Karim Mohamed. 1255-1258 [doi]
• A high-speed low-complexity modified radix-2:::5::: FFT processor for gigabit WPAN applicationsTaesang Cho, Hanho Lee, Jounsup Park, Chulgyun Park. 1259-1262 [doi]
• On the complex Kernel-based adaptive filterTokunbo Ogunfunmi, Thomas Paul. 1263-1266 [doi]
• Adaptive identification of sparse systems with variable sparsityBijit Kumar Das, Mrityunjoy Chakraborty, Soumitro Banerjee. 1267-1270 [doi]
• Fault Tolerant Adaptive Filters based on modified discrete fourier transform architecturesChandrasekhar Radhakrishnan, William Kenneth Jenkins. 1271-1274 [doi]
• Digital post-linearization of a Wideband Low Noise Amplifier for ultra-wideband wireless receiversJarlath Ifiok Umoh, Tokunbo Ogunfunmi. 1275-1278 [doi]
• Sub-channel equalizer design based on geometric interpolation for FBMC/OQAM systemsCarlos Aurelio Faria da Rocha, Maurice G. Bellanger. 1279-1282 [doi]
• A 24 GHz quadrature pulsed oscillator for short-range UWB vehicular radar applicationsAhmed M. El-Gabaly, Carlos E. Saavedra. 1283-1286 [doi]
• Reduced-size ultra-wideband true-time-delay beam-forming receiversAhmed A. Helmy, Kamran Entesari. 1287-1290 [doi]
• A 2-6GHz broadband CMOS low-noise amplifier with current reuse topology utilizing a noise-shaping techniqueWei-Hsiang Hung, Kuan-Ting Lin, Jian-Yu Hsieh, Shey-Shi Lu. 1291-1294 [doi]
• A non-coherent FSK-OOK UWB impulse radio transmitter for clock-less synchronizationWei Tang, Eugenio Culurciello. 1295-1298 [doi]
• A 5.2 pJ/pulse impulse radio pulse generator in 90 nm CMOSKin Keung Lee, Malihe Zarre Dooghabadi, Håkon A. Hjortland, Øivind Næss, Tor Sverre Lande. 1299-1302 [doi]
• Low-complexity architectures for reliability-based message-passing non-binary LDPC decodingXinmiao Zhang, Fang Cai. 1303-1306 [doi]
• Sliding Window Method for stochastic LDPC decoderJienan Chen, JianHao Hu. 1307-1310 [doi]
• A high-throughput LDPC decoder architecture for high-rate WPAN systemsKyung-Il Baek, Hanho Lee, Chang-Seok Choi, Sangmin Kim, Gerald E. Sobelman. 1311-1314 [doi]
• An adaptive analog low-density parity-check decoder based on margin propagationMing Gu, Shantanu Chakrabartty. 1315-1318 [doi]
• QC-LDPC Decoding Architecture based on Stride SchedulingBongjin Kim, In-Cheol Park. 1319-1322 [doi]
• Bifurcation and basin in two coupled parametrically forced logistic mapsHironori Kumeno, Yoshifumi Nishio, Daniele Fournier-Prunaret. 1323-1326 [doi]
• Symmetry-breaking bifurcation in load resonant dc-dc convertersKuntal Mandal, Soumitro Banerjee, Chandan Chakraborty. 1327-1330 [doi]
• Resonate and fire dynamics in Complex Oscillation Based Test of analog filtersSergio Callegari, Fabio Pareschi, Gianluca Setti, Mani Soma. 1331-1334 [doi]
• Design of grid multi-wing butterfly chaotic attractors from piecewise Lü system based on switching control and heteroclinic orbitSimin Yu, Jinhu Lu, Guanrong Chen, Xinghuo Yu. 1335-1338 [doi]
• On rigorous integration of piece-wise linear continuous systemsZbigniew Galias. 1339-1342 [doi]
• Electrostatic vibration energy harvester with piezoelectric start-up generatorHelder R. Florentino, Raimundo C. S. Freire, Alan V. S. Sa, Caio Florentino, Dimitri Galayko. 1343-1346 [doi]
• Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97 Thomas Santa, Mario Auer, Christoph Sandner, Christian Lindholm. 1351-1354 [doi]
• Switched-capacitor based step-up converter for alternative energy applicationsQingquan Tang, Bo Li, Dariusz Czarkowski, Adrian Ioinovici. 1355-1358 [doi]
• EMC influence of the charge pump in linear regulators - Design, simulation and measurementsJuergen Wittmann, Bernhard Wicht. 1359-1362 [doi]
• A novel implementation of dithered digital delta-sigma modulators via bus-splittingBrian Fitzgibbon, Michael Peter Kennedy, Franco Maloberti. 1363-1366 [doi]
• A second-order switched-capacitor ΔΣ modulator using very incomplete settlingBlazej Nowacki, Nuno F. Paulino, João Goes. 1367-1370 [doi]
• A low-power third-order ΔΣ modulator using a single operational amplifierAldo Pena-Perez, Edoardo Bonizzoni, Franco Maloberti. 1371-1374 [doi]
• A 400 MHz delta-sigma modulator for bandpass IF digitization around 100 MHz with excess loop delay compensationAkhil Gupta, Shahrokh Ahmadi, Mona E. Zaghloul. 1375-1378 [doi]
• Generalized multi-stage closed loop sigma delta modulatorVan Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bénabès. 1379-1382 [doi]
• Adaptation algorithms for a class of continuous time analog equalizers with application to serial linksPervez M. Aziz, Amaresh V. Malipatil. 1383-1386 [doi]
• A 5s-time-constant temperature-stable integrator for a tuneable PID controller in LOC applicationsYuanqi Hu, Yan Liu, Timothy G. Constandinou, Christofer Toumazou. 1387-1390 [doi]
• Electronic time stretching for fast digitizationNagendra Krishnapura. 1391-1394 [doi]
• Integrated multi-tap transformer for reconfigurable multimode matching networksXiaohua Yu, Nathan M. Neihart. 1395-1398 [doi]
• A high linear low flicker noise 25 duty cycle LO I/Q mixer for a FM radio receiverJae-Seung Lee, Chang-Jin Jeong, Yeong-Shin Jang, In-Young Lee, Sang-Sung Lee, Seok-Kyun Han, Sang-Gug Lee. 1399-1402 [doi]
• Design of power-rail ESD clamp circuit with adjustable holding voltage against mis-trigger or transient-induced latch-on eventsChih-Ting Yeh, Yung-Chih Liang, Ming-Dou Ker. 1403-1406 [doi]
• Addressing crosstalk issue in on-chip carbon nanotube interconnects using negative capacitanceMd. Khaled Hassan, Md. Sajjad Rahaman, Masud H. Chowdhury. 1407-1410 [doi]
• Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuitsEmre Salman. 1411-1414 [doi]
• A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOSRobert Szczygiel, Pawel Grybos, Piotr Maj. 1415-1418 [doi]
• A 12Gbps all digital low power SerDes transceiver for on-chip networkingSally Safwat, Ezz El-Din O. Hussein, Maged Ghoneima, Yehea I. Ismail. 1419-1422 [doi]
• A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement techniqueYu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen. 1423-1426 [doi]
• Desynchronize a legacy floating-point adder with operand-dependant delay elementsJun Xu, Hong Wang. 1427-1430 [doi]
• A new RNS scaler for {2:::n::: - 1, 2:::n:::, 2:::n::: + 1}Jeremy Yung Shern Low, Chip-Hong Chang. 1431-1434 [doi]
• Design of multi-residue generators using shared logicStanislaw J. Piestrak. 1435-1438 [doi]
• Minimum adder depth multiple constant multiplication algorithm for low power FIR filtersKenny Johansson, Oscar Gustafsson, Linda DeBrunner, Lars Wanhammar. 1439-1442 [doi]
• 0.5V wavelet filters using current mirrorsCostas Laoudias, Costas Beis, Costas Psychalinos. 1443-1446 [doi]
• A 16-channel low-noise programmable system for the recording of neural signalsCarolina Mora Lopez, Dries Braeken, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle. 1451-1454 [doi]
• A 0.6V CMOS Image Sensor with in-pixel biphasic current driver for biomedical applicationChin-Lin Lee, Chih-Cheng Hsieh. 1455-1458 [doi]
• Design of widely tunable Mexican hat wavelet filter for cardiac signal analysisAmandeep Singh, Refet Firat Yazicioglu, Chris Van Hoof. 1459-1462 [doi]
• Early case splitting and false path detection to improve high level ATPG techniquesBijan Alizadeh, Masahiro Fujita. 1463-1466 [doi]
• A fast and stable explicit integration method by matrix exponential operator for large scale circuit simulationShih-Hung Weng, Peng Du, Chung-Kuan Cheng. 1467-1470 [doi]
• Novel simulation approach for 3G W-CDMA receiversMazen Abi-Hussein, Corinne Berland, Olivier Venard. 1471-1474 [doi]
• A heuristic algorithm for reducing system-level test vectors with high branch coverageKoji Yamazaki, Yusuke Sekihara, Takashi Aoki, Eiichi Hosoya, Akira Onozawa. 1475-1478 [doi]
• CNF encodings of cardinality in formal methods for robustness checking of gate-level circuitsMiroslav N. Velev, Ping Gao 0002. 1479-1482 [doi]
• Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-coresFrancesco Menichelli, Mauro Olivieri, Simone Smorfa. 1483-1486 [doi]
• Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systemsYuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao. 1487-1490 [doi]
• A parallel architecture for ray-tracing with an embedded intersection algorithmAlexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak. 1491-1494 [doi]
• Sub-pixel downsampling of video with matching highly data re-use hardware architectureXing Wen, Oscar C. Au, Jiang Xu, Lu Fang, Run Cha. 1495-1499 [doi]
• Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-ChipGabriel Marchesan Almeida, Rémi Busseuil, Everton Alceu Carara, Nicolas Hebert, Sameer Varyani, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Fernando Gehm Moraes. 1500-1503 [doi]
• Orthonormal eigenvectors of the DFT-IV matrix by the eigenanalysis of a nearly tridiagonal matrixMagdy T. Hanna. 1504-1507 [doi]
• The 2-D Modulated Discrete Fourier Transform for 2-D fast convolution and digital filteringChandrasekhar Radhakrishnan, William Kenneth Jenkins. 1508-1511 [doi]
• Filterbank-based fast parallel algorithms for 2-D DHT-based real-valued discrete Gabor transformLiang Tao, H. K. Kwan, Juan-juan Gu. 1512-1515 [doi]
• An efficient algorithm for the conjugate symmetric sequency-ordered complex Hadamard transformSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 1516-1519 [doi]
• Jacket Haar transformJian-Jiun Ding, Soo-Chang Pei, Po-Hung Wu. 1520-1523 [doi]
• Emerging applications for multi/many-core processorsVictor W. Lee, Yen-Kuang Chen, Pradeep Debuy. 1524-1527 [doi]
• GPU-enabled parallel processing for image halftoning applicationsBarry M. Trager, Chai Wah Wu, Mikel Stanich, Kartheek Chandu. 1528-1531 [doi]
• A highly-integrated biomedical multiprocessor system for portable brain-heart monitoringEricson Chua, Wai-Chi Fang, Chiu-Kuo Chen, Chih-Chung Fu, Shao-Yen Tseng, Shih Kang, Zong-Han Hsieh. 1532-1535 [doi]
• Applications of the virtual cellular machine to many-core processorsTamás Roska, Ákos Zarándy, Giovanni Egidio Pazienza. 1536-1539 [doi]
• UWB beamforming architecture for RTLS applications using digital phase-shiftersFarid Bautista, Dominique Morche, Francois Dehmas, Gilles Masson. 1540-1543 [doi]
• A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applicationsHaipeng Fu, Deyun Cai, Junyan Ren, Wei Li. 1544-1547 [doi]
• An integrated beamformer for IR-UWB receiver in 0.18-µm CMOSYuan Gao, Yuanjin Zheng, Shengxi Diao, Yao Zhu, Chun-Huat Heng. 1548-1551 [doi]
• Analog front-end RX design for UWB impulse radio in 90nm CMOSDavid Sarmiento M., Zhuo Zou, Qin Zhou, Jia Mao, Peng Wang, Fredrik Jonsson, Li-Rong Zheng. 1552-1555 [doi]
• A 3.1-8 GHz CMOS UWB front-end receiverAli Meaamar, Chirn Chye Boon, Xiaomeng Shi, Wei Meng Lim, Kiat Seng Yeo, Manh Anh Do. 1556-1559 [doi]
• A wide dynamic range CMOS image sensor with the optimum photoresponse per pixelDipayan Das, Hereward J. Mills, Steve Collins. 1560-1563 [doi]
• A processor element for a mixed signal cellular processor array vision chipStephen J. Carey, Alexey Lopich, Piotr Dudek. 1564-1567 [doi]
• A 3-pin 1V 115µW 176×144 autonomous active pixel image sensor in 0.18µm CMOSJoseph H. Lin, Recep Ozgun, Philippe O. Pouliquen, Andreas G. Andreou, Charalambos M. Andreou, Julius Georgiou. 1568-1571 [doi]
• Sensitivity and uniformity of a 0.18µm CMOS temporal contrast pixel arrayChristoph Posch, Daniel Matolin. 1572-1575 [doi]
• Optical characterization of a polarization imagerTimothy York, Viktor Gruev. 1576-1579 [doi]
• Performance analysis of differential chaotic shift keying communications in MIMO systemsGeorges Kaddoum, Mai Vu, François Gagnon. 1580-1583 [doi]
• Improving the computer network intrusion detection performance using the relevance vector machine with Chebyshev chaotic mapDi He. 1584-1587 [doi]
• Efficient attack strategy to communication networks with partial degree informationYongxiang Xia, Jin Fan. 1588-1591 [doi]
• Roles of betweenness in controlling catastrophic cascading failures on scale-free networksXun Li, Xiang Li. 1592-1595 [doi]
• A study of synchronization of complex networks via pinning controlJiahu Qin, Wei Xing Zheng, Huijun Gao. 1596-1599 [doi]
• Small-signal modeling of PWM Z-source converter by circuit-averaging techniqueVeda Prakash Galigekere, Marian K. Kazimierczuk. 1600-1603 [doi]
• Fixed-frequency Pseudo Sliding Mode control for a Buck-Boost DC-DC converter in mobile applications: A comparison with a linear PID controllerMatteo Agostinelli, Robert Priewasser, Stefano Marsili, Mario Huemer. 1604-1607 [doi]
• Discrete-time H∞ control of PWM inverters: Experimental results complying with IEC 62040-3S. P. Ribas, Vinicius Foletto Montagner, Humberto Pinheiro, Ricardo C. L. F. Oliveira. 1608-1611 [doi]
• Cross-Regulation-Suppression control scheme for CCM Single-Inductor-Dual-Output buck converter with ordered-power-distributive controlCheng Huang, Philip K. T. Mok. 1612-1615 [doi]
• Analysis of a high-voltage-gain hybrid switched-capacitor buck converterSong Xiong, Siew-Chong Tan, Siu Chung Wong. 1616-1619 [doi]
• Binary Access Memory: An optimized lookup table for successive approximation applicationsBenjamin Hershberg, Skyler Weaver, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon. 1620-1623 [doi]
• A signal-specific successive-approximation analog-to-digital converterHassan Sepehrian, Mehdi Saberi, Reza Lotfi. 1624-1627 [doi]
• Accurate stability prediction of single-bit higher-order delta-sigma (Δ-Σ) modulators for speech codecsJaswinder Lota, Mohammed Al-Janabi. 1628-1631 [doi]
• An online fully-digital calibration of leakage noise in MASH continuous time ΔΣ modulatorsSudharsan Kanagaraj, Bahar Jalali Farahani. 1632-1635 [doi]
• Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receiversRamy Saad, Sebastian Hoyos. 1636-1639 [doi]
• A 0.47mW 6:::th:::-order 20MHz active filter using highly power-efficient OpampLe Ye, Congyin Shi, Huailin Liao, Ru Huang. 1640-1643 [doi]
• 4:::th:::-Order 84dB-DR CMOS-90nm low-pass filter for WLAN receiversMarcello De Matteis, Alessandro Pezzotta, Andrea Baschirotto. 1644-1647 [doi]
• Synthesis of linear-phase selective filters based on maximum of time-domain responseMladen Vucic, Goran Molnar, Sasa Djukic. 1648-1651 [doi]
• Analog 2D fan filters from discrete domain transfer functionsArjuna Madanayake, Leonid Belostotski, Chamith Wijenayake, Len T. Bruton. 1652-1655 [doi]
• A novel reconfigurable alias interference cancellation technique for A-to-D conversionMansour Rachid, Sudhakar Pamarti, Babak Daneshrad. 1656-1659 [doi]
• Estimation of thermal status in multi-core systemsSimone Corbetta, William Fornaciari. 1660-1663 [doi]
• Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processorsSeungwook Paek, Jiehwan Oh, Sang-Hye Chung, Lee-Sup Kim. 1664-1667 [doi]
• A circuit implementation for dynamic thermal management techniquesPritesh Vora, Masud H. Chowdhury. 1668-1671 [doi]
• Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitationWoojin Yun, Kyungsu Kang, Chong-Min Kyung. 1672-1675 [doi]
• Energy-aware dynamic task mapping for NoC-based MPSoCsMarcelo Mandelli, Luciano Ost, Everton Carara, Guilherme Guindani, Thiago Gouvea, Guilherme Medeiros, Fernando Gehm Moraes. 1676-1679 [doi]
• Efficient implementation of secondary synchronization symbol detection in 3GPP LTEAmr G. Wassal, Ahmed R. Elsherif. 1680-1683 [doi]
• High speed eight-parallel mixed-radix FFT Processor for OFDM systemsEun Ji Kim, Myung Hoon Sunwoo. 1684-1687 [doi]
• VLSI architecture for a reconfigurable Spectrally Efficient FDM baseband transmitterPaul N. Whatmough, Marcus R. Perrett, Safa Isam, Izzat Darwazeh. 1688-1691 [doi]
• A 12 Gb/s chip-to-chip AC coupled transceiverYu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen. 1692-1695 [doi]
• Reconfigurable cell array for concurrent support of multiple radio standards by flexible mappingChenxin Zhang, Isael Diaz, Per Andersson, Joachim Neves Rodrigues, Viktor Öwall. 1696-1699 [doi]
• High CMRR power efficient neural recording amplifier architecturePablo Castro, Fernando Silveira. 1700-1703 [doi]
• A power efficient neural spike recording channel with data bandwidth reductionAlberto Rodriguez-Perez, Jesús Ruiz-Amaya, Jose Antonio Rodríguez-Rodríguez, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. 1704-1707 [doi]
• A fully-adjustable dynamic range capacitance sensing circuit in a 0.15µm 3D SOI processJianan Song, David Welch, Jennifer Blain Christen. 1708-1711 [doi]
• CMOS DAC-sharing stimulator for neural recording and stimulation arraysKarim Abdelhalim, Roman Genov. 1712-1715 [doi]
• A 2.4µW 400nC/s constant charge injector for wirelessly-powered electro-acupunctureHyungwoo Lee, Kiseok Song, Long Yan, Hoi-Jun Yoo. 1716-1719 [doi]
• An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architectureAwais Sani, Philippe Coussy, Cyrille Chavet, Eric Martin. 1720-1723 [doi]
• An implementation of the circuit multiobjective optimization with the weighted sum strategy and goal attainment methodJosef Dobes, Jan Míchal. 1728-1731 [doi]
• Analysis of Mean-Square-Error (MSE) for fixed-point FFT unitsO. Sarbishei, Katarzyna Radecka. 1732-1735 [doi]
• An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checkingYu Pang, Katarzyna Radecka. 1736-1739 [doi]
• Unconstrained regularized ℓp-norm based algorithm for the reconstruction of sparse signalsJeevan K. Pant, Wu-Sheng Lu, Andreas Antoniou. 1740-1743 [doi]
• Real-time compressed sensing-based electrocardiogram compression on energy-constrained wireless body sensorsHossein Mamaghanian, Nadia Khaled, David Atienza, Pierre Vandergheynst. 1744-1747 [doi]
• Generic sensing hardware and real-time reconstruction for structured analog signalsMoshe Mishali, Rolf Hilgendorf, Eli Shoshan, Ina Rivkin, Yonina C. Eldar. 1748-1751 [doi]
• Compressed sensing for DOA estimation with fewer receivers than sensorsJian-Feng Gu, Wei-Ping Zhu, M. N. S. Swamy. 1752-1755 [doi]
• Generalized 2D lattice structure for causal and noncausal modeling of random fieldsAhmet H. Kayran, Erdogan Camcioglu, Ender M. Eksioglu, A. Korhan Tanc, Serhat Seker. 1756-1759 [doi]
• Direct design of phase factor in the common-factor technique for Hilbert-PairsDavid B. H. Tay. 1760-1763 [doi]
• Assessment of NPR MDFT filter banks for subband coding and data transmissionFernando Cruz-Roldán, Manuel Blanco-Velasco, José Sáez Landete, Conor Heneghan, Pedro Amo-López. 1764-1767 [doi]
• A method to convert near-perfect into perfect reconstruction FIR prototype filters for modulated filter banksLeonardo Gomes Baltar, Amine Mezghani, Josef A. Nossek. 1768-1771 [doi]
• Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decodersChristoph Roth, Alessandro Cevrero, Christoph Studer, Yusuf Leblebici, Andreas Burg. 1772-1775 [doi]
• Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codesYang Sun, Guohui Wang, Joseph R. Cavallaro. 1776-1779 [doi]
• Low power LDPC decoder with efficient stopping scheme for undecodable blocksTinoosh Mohsenin, Houshmand Shirani-mehr, Bevan M. Baas. 1780-1783 [doi]
• LDPC decoder architecture for high-data rate personal-area networksMatthew Weiner, Borivoje Nikolic, Zhengya Zhang. 1784-1787 [doi]
• Hardware implementation challenges of modern error control decodersChristian Schlegel, Vincent C. Gaudet. 1788-1791 [doi]
• Wide dynamic range, 0.8 to 6 GHz LNA in 45 nm digital SOI CMOSJangjoon Lee, Byunghoo Jung. 1792-1795 [doi]
• A 1.5 GHz high-Q receiver based on current reuseJianlei Shi, Jagdish Nayayan Pandey, Brian P. Otis. 1800-1803 [doi]
• A Double notch RF filter architecture for SAW-less GPS receiversCarsten Barth, Ivan R. Linscott, Umran S. Inan. 1804-1807 [doi]
• Digital energy detection for OOK demodulation in ultra-low power radiosJesse Richmond, Jan M. Rabaey. 1808-1811 [doi]
• A self-biased PLL-tuned AER pixel for high-speed infrared imagersJosep Maria Margarit, Michele Dei, Lluís Terés, Francisco Serra-Graells. 1812-1815 [doi]
• Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistanceMichael J. Hall, Viktor Gruev, Roger D. Chamberlain. 1816-1819 [doi]
• Dual VDD block based CMOS image sensor - preliminary evaluationQing Gao, Orly Yadid-Pecht. 1820-1823 [doi]
• A 32×32 single photon avalanche diode imager with delay-insensitive address-event readoutJoseph H. Lin, Andreas G. Andreou. 1824-1827 [doi]
• Noise modeling of Stokes parameters in division of focal plane polarization imagersRob Perkins, Viktor Gruev. 1828-1831 [doi]
• SPICE modeling of memristorsHisham Abdalla, Matthew D. Pickett. 1832-1835 [doi]
• Modeling and analysis of nonlinearities and bandwidth limitations in RF receiversErwin J. G. Janssen, Dusan M. Milosevic, Peter G. M. Baltus, Hooman Habibi. 1836-1839 [doi]
• Nonlinear behavior of electrostatic discharge protection structures under high-power microwave excitation: Modeling and simulationZeynep Dilli, Akin Akturk, Neil Goldsman, Michael A. Holloway, John C. Rodgers. 1840-1843 [doi]
• A new approach for electrothermal analysis of electronic circuitsFarah A. Mohammadi, Farnoos Farrokhi Farkhani, Shazzat Hossain. 1844-1847 [doi]
• A novel optimization method for CT sigma-delta-modulators using a switched system modelChristoph Zorn, Sebastian Stegemann, Timon Brucknery, Maurits Ortmanns, Wolfgang Mathis. 1848-1851 [doi]
• Hybrid intelligent system for daily maximum temperature forecasting in smart gridsHiroyuki Mori, Akira Takahashi. 1852-1855 [doi]
• A fast method for islanding analysis in power system gridsEdson A. R. Theodoro, Raphael A. S. Benedito, Luís F. C. Alberto. 1856-1859 [doi]
• A mixed-signal platform dedicated to power system dynamic computationLaurent Fabre, Ira Nagel, Cedric Meinen, Rachid Cherkaoui, Maher Kayal. 1860-1863 [doi]
• Circuit model of a phase-shifting transformer for analog power flow emulationJuan C. Jiménez, Chika O. Nwankpa. 1864-1867 [doi]
• High frequency and low power semi-synchronous PFM state machineChristian Lindholm. 1868-1871 [doi]
• -99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiverCongyin Shi, Chuan Wang, Le Ye, Huailin Liao. 1876-1879 [doi]
• Third order harmonic cancellation technique for a parametric amplifierHitesh Shrimali, Shouri Chatterjee. 1880-1883 [doi]
• A highly linear mixer with inherent balun using a new technique to remove common mode currentsMahdi Barati, Mohammad Yavari. 1884-1887 [doi]
• Analysis of transformer-based resonator quality factor and bandwidth and the implications to VCOsAmany El-Gouhary, Nathan M. Neihart. 1888-1891 [doi]
• Behavioral modeling of direct sampling mixerHuan Wang, Yun Pan, Xiaolang Yan, Ruohong Huan. 1892-1895 [doi]
• Power efficiency in communication systems from a circuit perspectiveAmine Mezghani, Josef A. Nossek. 1896-1899 [doi]
• Adaptive power reconfigurability for decreasing power dissipation of wireless personal area network receiversAlp Oguz, Dominique Morche, Catherine Dehollain. 1900-1903 [doi]
• Computationally-efficient iterative decoding for storage system design: Min-Sum refinedBen-Yue Chang, Milos Ivkovic, Lara Dolecek. 1904-1907 [doi]
• Current-slope-controlled adaptive-on-time DC-DC converter with fixed frequency and fast transient responseXiaocheng Jing, Philip K. T. Mok, Ming Chak Lee. 1908-1911 [doi]
• An energy-based heuristic operator method for resonant power circuit estimation predicting parameter sensitivityMatthias Radecker, Fabio Bisogno, Lyudmila Zinchenko. 1912-1915 [doi]
• Limit cycle control of an industrially applied resonant converter modelled as a hybrid systemAnders Hultgren, Jan Melin, Per Ranstad. 1916-1919 [doi]
• An alternative strategy for reducing mode transitions in a four-switch buck-boost converterMartin F. Ceci, María Belén D Amico. 1920-1923 [doi]
• A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point trackingCarlos Carvalho, Guilherme Lavareda, Jose Lameiro, Nuno Paulino. 1924-1927 [doi]
• A priority based output arbiter for NoC routerCheng-Hao Chan, Kun-Lin Tsai, Feipei Lai, Shun-Hung Tsai. 1928-1931 [doi]
• A flexible hardware implementation of SHA-1 and SHA-2 Hash FunctionsJames Docherty, Albert Koelmans. 1932-1935 [doi]
• Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operationWeng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, Yin Sun, Kok-Leong Chang. 1936-1939 [doi]
• Reconfigurable clock polarity assignment for peak current reduction of clock-gated circuitsJianchao Lu, Baris Taskin. 1940-1943 [doi]
• Design methodology of multistage time-domain logic speculation circuitsYiNan Sun, Yongpan Liu, Xiaohan Wang, Hongliang Xu, Huazhong Yang. 1944-1947 [doi]
• Implementation of all-digital wideband RF frequency synthesizers in 65-nm CMOS technologyTapio Rapinoja, Liangge Xu, Kari Stadius, Jussi Ryynänen. 1948-1951 [doi]
• A thermal-aware task mapping flow for coarse-grain dynamic reconfigurable processorLi Xie, Weifeng He, Naifeng Jing, Zhigang Mao. 1952-1955 [doi]
• Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded systemYing-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljiljana Trajkovic. 1956-1959 [doi]
• An area-efficient high-accuracy prediction-based CABAC decoder architecture for H.264/AVCMing-Yu Kuo, Yao Li, Chen-Yi Lee. 1960-1963 [doi]
• Image based approach with k-mean clustering for the compression of human motion sequencesBoon Seng Chew, Lap-Pui Chau, Kim-Hui Yap. 1964-1967 [doi]
• Robust synchronization technique for chaotic symbolic dynamics modulationGeorges Kaddoum, Ghyslain Gagnon, François Gagnon. 1968-1971 [doi]
• Optimization of quartic double-well bistable stochastic resonance systemDi He. 1972-1975 [doi]
• A chaotic motion controller for camera networksChi-Tsun Cheng, Henry Leung. 1976-1979 [doi]
• Pseudo-chaotic lossy compression of TRBGsTommaso Addabbo, Ada Fort, Ljupco Kocarev, Santina Rocchi, Valerio Vignoli. 1980-1983 [doi]
• Distance sensing for mini-robots: RSSI vs. TDOAChris Perkins, Lydia Lei, Michael Kuhlman, Tsunghsueh Lee, George Gateau, Sarah Bergbreiter, Pamela Abshire. 1984-1987 [doi]
• Live demonstration: Packet-based AER with 3Gevent/s cumulative throughputStefan Schiefer, Stephan Hartmann, Stefan Scholze, Johannes Partzsch, Christian Mayr, Stephan Henker, René Schüffny. 1988 [doi]
• Live demonstration: Real-time image processing on ASPA2 vision systemAlexey Lopich, David Robert Wallace Barr, Bin Wang, Piotr Dudek. 1989 [doi]
• Live demonstration: Material detection via an integrated polarization imagerTimothy York, Rob Perkins, Viktor Gruev. 1990 [doi]
• Live demonstration: Electronic doubler of electricityAntônio Carlos M. de Queiroz. 1991 [doi]
• Live demonstration: The prototype of real-time image pre-processing system for satellites remote sensingTsan-Jieh Chen, Chih-Hui Weng, Herming Chiueh, Chih-Cheng Hsieh, Shang-Fu Yeh, Wen-Hsu Chang, Ying-Zong Juang, Hann-Huei Tsai, Chin-Fong Chiu. 1992-1996 [doi]
• Live demonstration: A CMOS-based lab-on-chip array for combined magnetic manipulation and opto-chemical sensingZheng Da Clinton Goh, Pantelis Georgiou, Timothy G. Constandinou, Themistoklis Prodromakis, Christofer Toumazou. 1997-2001 [doi]
• Live demonstration: MWC for real-time applicationRolf Hilgendorf, Moshe Mishali, Yonina C. Eldar, Eli Shoshan, Ina Rivkin. 2002 [doi]
• A novel temperature and disturbance insensitive DAC calibration methodElbert Bechthum, Georgi I. Radulov, Arthur H. M. van Roermund. 2003-2006 [doi]
• An area-efficient TFT-LCD column driver with DAC sharing techniqueChih-Wen Lu, Hung-Cheng Chen, Yen-Chung Huang. 2007-2010 [doi]
• A 0.7-V 100-µW audio delta-sigma modulator with 92-dB DR in 0.13-µm CMOSZhenglin Yang, Libin Yao, Yong Lian. 2011-2014 [doi]
• Timing error measurement for highly linear wideband Digital to Analog ConvertersElbert Bechthum, Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund. 2019-2022 [doi]
• A monolithic CMOS MEMS accelerometer with chopper correlated double sampling readout circuitChun-Kai Wang, Che-Sheng Chen, Kuei-Ann Wen. 2023-2026 [doi]
• High voltage protection for USB transceivers in 45nm CMOSJagdish Chand, Ravi Mehta, Sumantra Seth, Sujoy Chakravarty. 2027-2030 [doi]
• The integrate-and-fire sampler: A special type of asynchronous Σ - Δ modulatorAlexander Singh-Alvarado, Manu Rastogi, John G. Harris, Jose C. Principe. 2031-2034 [doi]
• A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP testRajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj Amrutur. 2035-2038 [doi]
• Bulk-driven DC level shifterYasutaka Haga, Izzet Kale. 2039-2042 [doi]
• Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variationsMilena Djukanovic, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti, Massimo Alioto. 2043-2046 [doi]
• A dynamic calibration scheme for on-chip process and temperature variationsMina Raymond, Maged Ghoneima, Yehea I. Ismail. 2047-2050 [doi]
• Validation of and delay variation in total ionizing dose hardened standard cell librariesLawrence T. Clark, David E. Pettit, Keith E. Holbert, Nathan D. Hindman. 2051-2054 [doi]
• IDVP (Intra-Die Variation Probe) for System-On-Chip (SoC) Infant Mortality screenMohd Azman Abdul Latif, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin. 2055-2058 [doi]
• A Hilbert curve-based delay fault characterization method for FPGAsWenjuan Zhang, Yajun Ha. 2059-2062 [doi]
• A low-leakage parallel CRC generator for ultra-low power applicationsLouis P. Alarcón, Tsung-Te Liu, Jan M. Rabaey. 2063-2066 [doi]
• Adjacent-State monitoring based fine-grained power-gating scheme for a low-power asynchronous pipelined systemTakao Kawano, Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu. 2067-2070 [doi]
• Ultra-low power current-based PUFMehrdad Majzoobi, Golsa Ghiaasi, Farinaz Koushanfar, Sani R. Nassif. 2071-2074 [doi]
• Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technologyFabio Frustaci, Pasquale Corsonello, Massimo Alioto. 2075-2078 [doi]
• A novel back-biasing low-leakage technique for FinFET forced stacksDavide Baccarin, David Esseni, Massimo Alioto. 2079-2082 [doi]
• Low power InfomaxICA with compensation strategy for binaural hearing-aidFan-Chiang Yi, Ching-Wen Huang, Tai-Shih Chi, Shyh-Jye Jou. 2083-2086 [doi]
• Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraintsMatteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani. 2087-2090 [doi]
• Improved ultrasound digital beamforming using single-bit sigma-delta modulators with band-pass decimation filtersGunes D. Altinok, Mohammed Al-Janabi, Izzet Kale. 2091-2094 [doi]
• Compressive sampling of EMG bio-signalsAabeeya Salman, Emily G. Allstot, Andrew Y. Chen, Anna M. R. Dixon, Daibashish Gangopadhyay, David J. Allstot. 2095-2098 [doi]
• Effects of quantization on neural spike sortingSarah Gibson, Victoria Wang, Dejan Markovic. 2099-2102 [doi]
• Modelling, analysis and control of multi-agent systems: A brief overviewJinhu Lu, Guanrong Chen, Xinghuo Yu. 2103-2106 [doi]
• Study of near consensus complex social networks using eigen theoryBingo Wing-Kuen Ling, Paul Stewart, Kok Lay Teo, Chi K. Tse. 2107-2110 [doi]
• Can stubbornness or gullibility lead to faster consensus? A study of various strategies for reaching consensus in a model of the naming gameChai Wah Wu. 2111-2114 [doi]
• A gravity-based A/R model of swarming a multi-agent network with density informationWen-Qiang Tian, Xiang Li. 2115-2118 [doi]
• Multi-granularity dynamic analysis of complex software networksBing Li, Weifeng Pan, Jinhu Lu. 2119-2124 [doi]
• Signal recovery method for compressive sensing using relaxation and second-order cone programmingFlávio C. A. Teixeira, Stuart W. A. Bergen, Andreas Antoniou. 2125-2128 [doi]
• Analog-to-information conversion of sparse and non-white signals: Statistical design of sensing waveformsMauro Mangia, Riccardo Rovatti, Gianluca Setti. 2129-2132 [doi]
• Impulsive noise estimation and cancellation in DSL using compressive samplingTareq Y. Al-Naffouri, F. F. Al-Shaalan, Ahmed Abdul Quadeer, H. Hmida. 2133-2136 [doi]
• On design of reduced-order ℋ2 filters for discrete repetitive processesLigang Wu, Wei Xing Zheng. 2137-2140 [doi]
• A very efficient single-iteration oldest-out data sorterVolnei A. Pedroni, Ricardo P. Jasinski, Ricardo U. Pedroni. 2141-2144 [doi]
• A low-complexity parametric transform for image compressionSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 2145-2148 [doi]
• Frame-level dependent bit allocation via geometric programmingChao Pang, Oscar C. Au, Jingjing Dai, Feng Zou. 2149-2152 [doi]
• Perceptual multiview video coding using synthesized Just Noticeable Distortion mapsYu Gao, Xiaoyu Xiu, Jie Liang, Weisi Lin. 2153-2156 [doi]
• Lossless implementation of Daubechies 8-tap wavelet transformKhan A. Wahid, Md. Ashraful Islam, Seok-Bum Ko. 2157-2160 [doi]
• Further results on convergence of cooperative standard cellular neural networksMauro Di Marco, Mauro Forti, Massimo Grazzini, Luca Pancioni. 2161-2164 [doi]
• An active wave computing based path finding approach for 3-D environmentVolkan Kilic, Mustak E. Yalcin. 2165-2168 [doi]
• Locally connected processor arrays for matrix multiplication and linear transformsChai Wah Wu. 2169-2172 [doi]
• Collision avoidance for UAV using visual detectionTamas Zsedrovits, Ákos Zarándy, Balint Vanek, Tamas Peni, Jozsef Bokor, Tamás Roska. 2173-2176 [doi]
• Influence of external input on Oscillatory Cellular Nonlinear Networks dynamicsLinda Ponta, Valentina Lanza, Michele Bonnin, Fernando Corinto. 2177-2180 [doi]
• A 0.7 - 2.6 GHz high-linearity rf front-end for cognitive radio spectrum sensingKari Stadius, Mikko Kaltiokallio, Jussi Ollikainen, Tuomas Parnanen, Ville Saari, Jussi Ryynänen. 2181-2184 [doi]
• Towards suppression of all harmonics in a polyphase multipath transmitterSaqib Subhan, Eric A. M. Klumperink, Bram Nauta. 2185-2188 [doi]
• Advanced filter bank based approach for blocker detection in LTE systemsThomas Schlechter, Mario Huemer. 2189-2192 [doi]
• Architecture and implementation of a Software-Defined Radio baseband processorUlrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Dominik Langen, Jörg Berthold, R. Kramer, A. Schackow, Cyprian Grassmann, Mirko Sauermann, P. Szreder, F. Capar, G. Obradovic, W. Xu, Nico Brüls, Kang Lee, Eugene Weber, Ray Kuhn, John Harrington. 2193-2196 [doi]
• A cross-correlation based signal detector with two-step down-converter robust to finite image rejectionWei-Gi Ho, Ranjit Gharpurey. 2197-2200 [doi]
• A circuit that creates a logarithmic response from an integrating CMOS pixelDipayan Das, Steve Collins. 2201-2204 [doi]
• Boosted readout for CMOS APS pixelsSuat U. Ay. 2205-2208 [doi]
• A very high dynamic range interface circuit for resistive gas sensor matrix read-outFabrizio Conso, Marco Grassi, Piero Malcovati, Andrea Baschirotto. 2209-2212 [doi]
• 125ppm resolution and 120dB dynamic range nanoparticle chemiresistor array readout circuitXiaoyi Mu, Daniel Rairigh, Andrew J. Mason. 2213-2216 [doi]
• Self-quenching, Forward-bias-reset for Single Photon Avalanche Detectors in 1.8V, 0.18µm processChanghyuk Lee, Alyosha Molnar. 2217-2220 [doi]
• Skew variability in 3-D ICs with multiple clock domainsHu Xu, Vasilis F. Pavlidis, Giovanni De Micheli. 2221-2224 [doi]
• Clock distribution models of 3-D integrated systemsIoannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman. 2225-2228 [doi]
• CAD tools for designing 3D integrated systemsKostas Siozios, Antonis Papanikolaou, Dimitrios Soudris. 2229-2232 [doi]
• 3D monolithic integrationPerrine Batude, Maud Vinet, Arnaud Pouydebasque, Cyrille Le Royer, Bernard Previtali, Claude Tabone, Jean-Michel Hartmann, Loic Sanchez, Laurence Baud, Veronique Carron, Alain Toffoli, Fabienne Allain, Vincent Mazzocchi, Dominique Lafond, Simon Deleonibus, Olivier Faynot. 2233-2236 [doi]
• Thermal analysis and active cooling management for 3D MPSoCsMohamed M. Sabry, David Atienza, Ayse Kivilcim Coskun. 2237-2240 [doi]
• Parallel memristors: Improving variation tolerance in memristive digital circuitsJeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose. 2241-2244 [doi]
• Time-dependency of the threshold voltage in memristive devicesEero Lehtonen, Jussi Poikonen, Mika Laiho, Wei Lu. 2245-2248 [doi]
• Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scalingFelice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jerome Mitard, Liesbeth Witters, Thomas Y. Hoffmann. 2249-2252 [doi]
• Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuitsRecep Ozgun, Byung J. Jung, Bal M. Dhar, Howard E. Katz, Andreas G. Andreou. 2253-2256 [doi]
• An analytical mismatch model of nano-CMOS device under impact of intrinsic device variabilityFeng Hong, Binjie Cheng, Scott Roy, David R. S. Cumming. 2257-2260 [doi]
• An optimum linear phase approximation with small delay obtained by the manipulation of all-pass Padé approximantsDouglas David Baptista de Souza, Sidnei Noceti Filho. 2265-2268 [doi]
• Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architecturesPhilippe Bénabès, Catalin-Adrian Tugui. 2269-2272 [doi]
• Analog circuit optimization via a modified Imperialist Competitive AlgorithmMilad Razzaghpour, Ana Rusu. 2273-2276 [doi]
• A Comprehensive Tapered buffer optimization algorithm for unified design metricsSong Liu, Seda Ogrenci Memik, Yehea I. Ismail. 2277-2280 [doi]
• A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°Wen-rui Zhu, Hai-Gang Yang, Tong-qiang Gao. 2281-2284 [doi]
• A nanopower CMOS bandgap reference with 30ppm/degree C from -30 degree C to 150 degree CPengpeng Yuan, Zhihua Wang, Dongmei Li, Xin Wang, Liyuan Liu. 2285-2288 [doi]
• A simple CMOS bandgap reference circuit with sub-1-V operationJoao Navarro Soares, Eder Ishibe. 2289-2292 [doi]
• Low-dropout regulators: Hybrid-cascode compensation to improve stability in nano-scale CMOS technologiesHamed Aminzadeh, Wouter A. Serdijn. 2293-2296 [doi]
• Adjustable input Self-Strobed Delay Line ADC intended to implantable devicesRobert Chebli, Mohamad Sawan. 2297-2300 [doi]
• Hardware-efficient parallel FIR digital filter structures for symmetric convolutionsYu-Chi Tsao, Ken Choi. 2301-2304 [doi]
• Fault tolerant computing for stream DSP applications using GALS multi-core processorsZhiyi Yu, Zewen Shi, Xiaoyang Zeng. 2305-2308 [doi]
• StreamPoP: Stream programming oriented power-efficient audio DSPJi Kong, Peilin Liu, Zhenqi Wei, Kun Yang, Ying Ye, Rendong Ying. 2309-2312 [doi]
• Multi-objective optimization of minority-3 functions for ultra-low voltage suppliesHans Kristian Otnes Berge, Snorre Aunet. 2313-2316 [doi]
• Energy efficient pseudo-cache architecture through fine-grained reconfigurabilityGabriel L. Nazar, Luigi Carro. 2317-2320 [doi]
• Compact lumped element model for TSV in 3D-ICsKhaled Salah, Alaa El Rouby, Hani Ragai, Karim Amin, Yehea I. Ismail. 2321-2324 [doi]
• The arbiter-PUF with high uniqueness utilizing novel arbiter circuit with Delay-Time MeasurementKota Fruhashi, Mitsuru Shiozaki, Akitaka Fukushima, Takahiko Murayama, Takeshi Fujino. 2325-2328 [doi]
• Evaluation of a distributed fault handler method for MPSoCNicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres. 2329-2332 [doi]
• A hybrid watermarking scheme for sequential functionsAijiao Cui, Chip-Hong Chang, Li Zhang. 2333-2336 [doi]
• Efficient inductance calculation for long and medium length rectangular interconnects in VLSI circuitsYiorgos I. Bontzios, Michael Dimopoulos, Alkis A. Hatzopoulos. 2337-2340 [doi]
• Contactless fluorescence imaging with a CMOS image sensorAndreas G. Andreou, Zhaonian Zhang, Recep Ozgun, Edward Choi, Zaven K. Kalayjian, Miriam Adlerstein Marwick, Jennifer Blain Christen, Leslie Tung. 2341-2344 [doi]
• Planar microcoils array applied to magnetic beads based lab-on-chip for high throughput applicationsYushan Zheng, Sara Bekhiche, Mohamad Sawan. 2345-2348 [doi]
• A new fully integrated CMOS interface for a dielectrophoretic lab-on-a-chip deviceMohamed Amine Miled, Mohamad Sawan. 2349-2352 [doi]
• Extending the dynamic range of implantable real-time neurochemical monitoring systemsCarlos I. Dorta-Quinones, Rajeev K. Dokania, Alyssa B. Apsel. 2353-2356 [doi]
• Attitude sensing system design for wireless Micro-Ball endoscopyJun Hu, Xiang Xie, Guolin Li, Yingke Gu, Yemao Zeng, Zhihua Wang. 2357-2360 [doi]
• Design rules for Quantum-dot Cellular AutomataWeiqiang Liu, Liang Lu, Máire O Neill, Earl E. Swartzlander Jr.. 2361-2364 [doi]
• Irreversible bit erasures in binary multipliersIsmo Hänninen, Jarmo Takala, Craig S. Lent. 2369-2372 [doi]
• A review of magnetic cellular automata systemsSanjukta Bhanja, Javier F. Pulecio. 2373-2376 [doi]
• QCAPro - An error-power estimation tool for QCA circuit designSaket Srivastava, Arjun Asthana, Sanjukta Bhanja, Sudeep Sarkar. 2377-2380 [doi]
• Reduced-complexity interpolation-based QR decomposition using partial layer mappingLi-Wei Chai, Po-Lin Chiu, Yuan-Hao Huang. 2381-2384 [doi]
• A reconfigurable baseband processor for wireless OFDM synchronization sub-systemMahmoud Abdelall, Ahmed F. Shalash, Hossam A. H. Fahmy. 2385-2388 [doi]
• DCD-based simplified matrix inversion for MIMO-OFDMZhi Quan, Yuriy V. Zakharov, Jie Liu. 2389-2392 [doi]
• Compensation of IQ imbalance and transmitter nonlinearities in broadband MIMO-OFDMFernando H. Gregorio, Juan E. Cousseau, Stefan Werner, Taneli Riihonen, Risto Wichman. 2393-2396 [doi]
• An uncoded BER comparison between DFE-SCCP and OFDM using a convex analysis frameworkAmanda de Paula, Cristiano Panazio. 2397-2400 [doi]
• Sparse kernel cepstral coefficients (SKCC): Inner-product based features for noise-robust speech recognitionAmin Fazel, Shantanu Chakrabartty. 2401-2404 [doi]
• Pitch-synchronous time alignment of speech signals for prosody transplantationVagner Latsch, Sergio L. Netto. 2405-2408 [doi]
• Adaptive thresholding approach for robust voiced/unvoiced classificationMd. Khademul Islam Molla, Keikichi Hirose, Sujan Kumar Roy, Shamim Ahmad. 2409-2412 [doi]
• Weighted noise subtraction and adaptive soft-thresholding approach to speech enhancementSomlal Das, Md. Ekramul Hamid, Keikichi Hirose, Md. Khademul Islam Molla. 2413-2416 [doi]
• Dominant harmonic modification with data adaptive filter based algorithm for robust pitch estimationSujan Kumar Roy, Md. Kamrul Hasan, Keikichi Hirose, Md. Khademul Islam Molla. 2417-2420 [doi]
• Integrate and fire circuit as an ADC replacementManu Rastogi, Alexander Singh-Alvarado, John G. Harris, Jose C. Principe. 2421-2424 [doi]
• Motion image sensor with on-chip adaptation and Programmable FilteringPeng Xu, Pamela Abshire, J. Sean Humbert. 2425-2428 [doi]
• Online correction of orientation estimates using spatial memory in a neuromorphic head direction systemTarek M. Massoud, Timothy K. Horiuchi. 2429-2432 [doi]
• Voltage mode driver for low power transmission of high speed serial AER LinksCarlos Zamarreño-Ramos, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Raghavendra Kulkarni, José Silva-Martínez. 2433-2436 [doi]
• Evaluating on-chip interconnects for low operating frequency silicon neuron arraysAndrew Cassidy, Thomas Murray, Andreas G. Andreou, Julius Georgiou. 2437-2440 [doi]
• Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum AnalysisDaibashish Gangopadhyay, Andrew Y. Chen, David J. Allstot. 2441-2444 [doi]
• Reducing spurious PLL tones in spectrum sensing architecturesShang-Kee Ting, Ali H. Sayed. 2445-2448 [doi]
• Low-power FFT design for NC-OFDM in cognitive radio systemsIn-Gul Jang, Zhe-Yan Piao, Ze-Hua Dong, Jin-Gyun Chung, Kang-Yoon Lee. 2449-2452 [doi]
• A 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applicationsZhiGang Sun, Baoyong Chi, Chun Zhang, Zhihua Wang. 2453-2456 [doi]
• Reconfigurable filter implementation of a matched-filter based spectrum sensor for Cognitive Radio systemsAmir Hossein Gholamipour, Ali Gorcin, Hasari Celebi, B. Ugur Töreyin, Mazen A. R. Saghir, Fadi J. Kurdahi, Ahmed M. Eltawil. 2457-2460 [doi]
• Estimating the location of a sound source with a spike-timing localization algorithmHolger Finger, Shih-Chii Liu. 2461-2464 [doi]
• Design of a spike event coded RGT microphone for neuromorphic auditory systemsThomas Jacob Koickal, Rhonira Latif, Luiz C. P. Gouveia, E. Mastropaolo, S. Wang, Alister Hamilton, R. Cheung, M. Newton, Leslie S. Smith. 2465-2468 [doi]
• Design of analog audio classifiers with AdaBoost-Based feature selectionLeung Kin Chiu, Brian Gestner, David V. Anderson. 2469-2472 [doi]
• A hybrid energy scavenging sensor for long-term mechanical strain monitoringChenling Huang, Shantanu Chakrabartty. 2473-2476 [doi]
• RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifierPing Zhao, Manfred Glesner. 2477-2480 [doi]
• Thermal-aware system-level modeling and management for Multi-Processor Systems-on-ChipFrancesco Zanini, David Atienza, Luca Benini, Giovanni De Micheli. 2481-2484 [doi]
• Design automation of transistor networks, a new challengeRicardo Reis. 2485-2488 [doi]
• Hybrid heterogeneous energy supply networksFarinaz Koushanfar, Azalia Mirhoseini. 2489-2492 [doi]
• Pure nodal analysis for efficient on-chip interconnect model order reductionFrank Liu, Peter Feldmann. 2493-2496 [doi]
• Stateful logic pipeline architectureKyosun Kim, Sangho Shin, Sung-Mo Kang. 2497-2500 [doi]
• Towards a legged chipTimir Datta, Pamela Abshire, John A. Turner. 2501-2504 [doi]
• Combining sdm-based circuit switching with packet switching in a NoC for real-time applicationsAngelo Kuti Lusala, Jean-Didier Legat. 2505-2508 [doi]
• Electrostatic actuation and control of micro robots using a post-processed high-voltage SOI CMOS chipMustafa Emre Karagozler, Anil Thaker, Seth Copen Goldstein, David S. Ricketts. 2509-2512 [doi]
• Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistorsYanan Sun, Volkan Kursun. 2513-2516 [doi]
• Improved dynamic range, digitally-controlled linear-in-dB CMOS variable gain amplifierSandhya Purighalla, Brent Maundy. 2517-2520 [doi]
• OBT implementation on Gm-C filters without self-tuning capabilityPablo A. Petrashin, Carlos Dualibe. 2521-2524 [doi]
• An ultra low-power low-voltage programmable temperature detection circuitAlfredo Olmos, Stefano Pietri, Ricardo Coimbra, Murillo Franco Neto, Jefferson B. D. Soldera. 2525-2528 [doi]
• An equivalent-time and clocked approach for continuous-time quantizationTakahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada. 2529-2532 [doi]
• A hybrid phase-locked loop for CDR ApplicationsMohammad Sadegh Jalali, Alireza Sharif Bakhtiar, Shahriar Mirabbasi. 2533-2536 [doi]
• An accurate sense-fet current limiter with embedded softstart for linear dc/dc convertersJader A. De Lima, Wallace A. Pimenta. 2537-2540 [doi]
• Supercapacitor-based reconfigurable energy management unit for autonomous wireless sensor nodesJoseph Sankman, Hai Chen, Dongsheng Ma. 2541-2544 [doi]
• Power management controller for automotive MCU applications in 90nm CMOS technologyAndre Mansano, Andre Vilas Boas, Alfredo Olmos, Stefano Pietri, Jefferson B. D. Soldera. 2545-2548 [doi]
• Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold areaY. Joly, L. Truphemus, L. Lopez, Jean Michel Portal, Hassen Aziza, F. Julien, P. Fornara. 2549-2552 [doi]
• Linear vt-based temperature sensors with low process sensitivity and improved power supply headroomChen Zhao, Jun He, Sheng-Huang Lee, Karl Peterson, Randall L. Geiger, Degang Chen. 2553-2556 [doi]
• Hardware synchronization for embedded multi-core processorsChristian Stoif, Martin Schoeberl, Benito Liccardi, Jan Haase. 2557-2560 [doi]