A clock gated flip-flop for low power applications in 90 nm CMOS

Mohamed O. Shaker, Magdy A. Bayoumi. A clock gated flip-flop for low power applications in 90 nm CMOS. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 558-562, IEEE, 2011. [doi]

Abstract

Abstract is missing.