A heuristic algorithm for reducing system-level test vectors with high branch coverage

Koji Yamazaki, Yusuke Sekihara, Takashi Aoki, Eiichi Hosoya, Akira Onozawa. A heuristic algorithm for reducing system-level test vectors with high branch coverage. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 1475-1478, IEEE, 2011. [doi]

Abstract

Abstract is missing.