Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology

Fabio Frustaci, Pasquale Corsonello, Massimo Alioto. Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 2075-2078, IEEE, 2011. [doi]

Abstract

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