A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique

Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen. A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 1423-1426, IEEE, 2011. [doi]

Abstract

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