Pui-In Mak - researchr alias

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Viewing Publication 1 - 100 from 343

2025

A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation BufferTan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Yong Chen 0005. tvlsi, 33(5):1422-1426, May 2025. [doi]

A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic ApplicationsChen Deng, Sai Wu, Chengcheng Liu, Yatao Peng, Man Kay Law, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. tcasI, 72(4):1533-1546, April 2025. [doi]

rms Jitter, -249.7dB FoM, and 1.98µS Locking Time Using Polarity-Reversible SSPDHaoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. isscc 2025: 1-3 [doi]

A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°CYueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin 0001, Pui-In Mak, Shiheng Yang. isscc 2025: 84-86 [doi]

A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC CalibrationRui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. jssc, 60(4):1437-1448, April 2025. [doi]

2 Resolution FoM in 28nm CMOSDan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. isscc 2025: 478-480 [doi]

A 0.35-0.5-V 0.0136-mm² 12 -MHz Digital Frequency-Locked Loop With 1.06%/V Line Sensitivity in 65-nm CMOSDan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. tcasII, 72(3):459-463, March 2025. [doi]

A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAMFei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. jssc, 60(3):1103-1112, March 2025. [doi]

Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor ReductionTailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin 0001, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui Paulo Martins, Pui-In Mak. tcasII, 72(3):439-443, March 2025. [doi]

Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal-oxide-semiconductorChaowei Yang, Yong Chen 0005, Kai Cheng, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak. ijcta, 53(3):1253-1291, March 2025. [doi]

An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up IdentificationZhizhan Yang, Haochen Zhang, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. tcasI, 72(3):1165-1177, March 2025. [doi]

14.5 A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and InferenceYiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Shidong Lv, Hao Wu, Cailian Ma, Ming Li, Jinshan Yue, Xinghua Wang, Guozhong Xing, Pui-In Mak, Xiaoran Li, Feng Zhang 0014. isscc 2025: 258-260 [doi]

A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHzXiangxun Zhan, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. tcasII, 72(2):389-393, February 2025. [doi]

GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible DataflowYi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. tcasI, 72(4):1657-1667, April 2025. [doi]

A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the EdgeHaochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. isscc 2025: 1-3 [doi]

A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM CellHaochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. jssc, 60(1):321-331, January 2025. [doi]

2024

An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering ApplicationsRujian Cao, Zhongyu Zhao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak. tcasII, 71(11):4688-4692, November 2024. [doi]

A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference SpurTianle Chen, Hongyu Ren, Zunsong Yang, Yunbo Huang, Xianghe Meng, Weiwei Yan, Weidong Zhang, Xuqiang Zheng, Xuan Guo, Tetsuya Iizuka, Pui-In Mak, Yong Chen 0005, Bo Li. vlsit 2024: 1-2 [doi]

2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal-oxide-semiconductorKai Cheng, Yong Chen 0005, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak. ijcta, 52(12):6028-6055, December 2024. [doi]

A Miniaturized MRI Scanner Featuring a HighVoltage SOI ASIC for Non-Invasive Object Reconstruction and Flow AnalysisShuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. biocas 2024: 1-5 [doi]

3 ResolutionShuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. isscc 2024: 316-318 [doi]

Quality Factor Optimization and Thermal Noise Analysis of Silicon MEMS ResonatorsZheng Fan, Zhu Li, Renguang Tang, Guanhua Wu, Shanqing Yang, Liang Cheng Tu, Yuan Wang, Pui-In Mak. ieeesensors 2024: 1-4 [doi]

2 Analog Compute-in-Memory MacroYuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu 0001, Minglei Zhang, Rui Paulo Martins, Pui-In Mak. jssc, 59(9):3021-3031, September 2024. [doi]

CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform QuantizationYuzhao Fu, Jixuan Li, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu 0001, Rui Paulo Martins, Pui-In Mak. tcasI, 71(11):4996-5004, November 2024. [doi]

A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude CompensationChangxuan Han, Zhixian Deng, Yiyang Shu, Jun Yin 0001, Pui-In Mak, Xun Luo. tcasI, 71(1):120-132, January 2024. [doi]

Extended Power Dynamic Range and Enhanced Power Conversion Efficiency of a Switched-Capacitor DC-DC Converter: A TutorialTian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. tcasII, 71(3):1606-1612, March 2024. [doi]

2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference SpurYunbo Huang, Yong Chen 0005, Zunsong Yang, Rui Paulo Martins, Pui-In Mak. isscc 2024: 130-132 [doi]

A Constant-Power and Optimal-Transfer-Efficiency Wireless Inductive Power Transfer Converter for Battery ChargerIo-Wa Iam, Chio-Kuan Choi, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins. tie, 71(1):450-461, 2024. [doi]

2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer InterfacesMoon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore. jssc, 59(4):1123-1136, April 2024. [doi]

10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase AlignmentHaoran Li, Tailong Xu, Xi Meng, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. isscc 2024: 204-206 [doi]

A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT AugmentationHuihua Li, Qiaobo Ma, Yang Jiang 0002, Rui Paulo Martins, Pui-In Mak. cicc 2024: 1-2 [doi]

A 512-nW 0.003-mm² Forward-Forward Closed Box Trainer for an Analog Voice Activity Detector in 28-nm CMOSJunde Li, Guoqiang Xin, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. tcasII, 71(11):4703-4707, November 2024. [doi]

LOAD-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/nsFeiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang 0002, Pui-In Mak, Rui Paulo Martins, Man Kay Law. jssc, 59(6):1747-1758, June 2024. [doi]

A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup TimeHaihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. jssc, 59(2):464-475, February 2024. [doi]

A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase AlignmentHaoran Li, Tailong Xu, Xi Meng, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. jssc, 59(12):3952-3965, December 2024. [doi]

A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOSYueduo Liu, Zihao Zhu, Rongxin Bao, Jiahui Lin, Jun Yin 0001, Qiang Li 0021, Pui-In Mak, Shiheng Yang. tcasI, 71(2):515-525, February 2024. [doi]

Invited Paper: A Multi-Phase Multi-Ratio Resonant Switched-Capacitor DC-DC Converter with Improved Power DensityJiyuan Liu, Qiaobo Ma, Yang Jiang 0002, Rui Paulo Martins, Pui-In Mak. icta3 2024: 182-185 [doi]

A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOSXin Lu, Jiangchao Wu, Zhao Wang, Yifei Xiang, Liyuan Liu, Pui-In Mak, Rui Paulo Martins, Man Kay Law. tcasII, 71(8):3635-3639, August 2024. [doi]

3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC CalibrationRui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. isscc 2024: 58-60 [doi]

3DensityQiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang 0002, Rui Paulo Martins, Pui-In Mak. cicc 2024: 1-2 [doi]

28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A OutputQiaobo Ma, Yang Jiang 0002, Huihua Li, Xiongjie Zhang, Man Kay Law, Rui Paulo Martins, Pui-In Mak. isscc 2024: 460-462 [doi]

A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss ReductionQiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang 0002, Man Kay Law, Rui Paulo Martins, Pui-In Mak. jssc, 59(10):3192-3203, October 2024. [doi]

Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor TechniqueYi Mao, Gengzhen Qi, Pui-In Mak. ojcands, 5:92-101, 2024. [doi]

2 On-Chip Bootstrap Driving DensityXuchu Mu, Yang Jiang 0002, Rui Paulo Martins, Pui-In Mak. vlsit 2024: 1-2 [doi]

A BW-Extended Fourth-Order Gain-Boosted N-Path Filter Employing a Switched gₘ-C NetworkGengzhen Qi, Haonan Guo, Yunchu Li, Pui-In Mak. jssc, 59(10):3183-3191, October 2024. [doi]

A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy With Adaptive ChirpingAbdolraouf Rahmani, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins. access, 12:102202-102211, 2024. [doi]

23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCOHaijun Shao, Rui Paulo Martins, Pui-In Mak. isscc 2024: 406-408 [doi]

A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCOHaijun Shao, Rui Paulo Martins, Pui-In Mak. jssc, 59(12):3980-3992, December 2024. [doi]

17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAMFei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. isscc 2024: 330-332 [doi]

2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOSFei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. jssc, 59(2):626-635, February 2024. [doi]

4-ppm- Δ F Injection Using Automatic Phase-Error CorrectionZixuan Wang, Xin Wang, Ka-Meng Lei, Wenjing Zhang, Yunjin Yin, Tailong Xu, Zhikuang Cai, Yufeng Guo, Pui-In Mak. jssc, 59(11):3780-3790, November 2024. [doi]

A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOSJiangchao Wu, Ke Hu, Xuanlin Chen, Pui-In Mak, Rui Paulo Martins, Man Kay Law. cicc 2024: 1-2 [doi]

A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic SparsityHao Wu, Yong Chen 0005, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang 0014. tcasI, 71(2):689-702, February 2024. [doi]

A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform QuantizationGuoqiang Xin, Fei Tan, Junde Li, Junren Chen, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. mwscas 2024: 882-887 [doi]

Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling AttacksChongyao Xu, Litao Zhang, Pui-In Mak, Rui Paulo Martins, Man Kay Law. tifs, 19:3927-3942, 2024. [doi]

A Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP RangeZhizhan Yang, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. tcasII, 71(10):4422-4426, October 2024. [doi]

A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOSJian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins, Quan Pan 0002. cicc 2024: 1-2 [doi]

A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX InterfaceZhizhan Yang, Jun Yin 0001, Wei-Han Yu, Haochen Zhang, Rui Paulo Martins, Pui-In Mak. jssc, 59(11):3670-3682, November 2024. [doi]

34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADCYiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang 0014. isscc 2024: 576-578 [doi]

A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/RefreshYi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. jssc, 59(11):3866-3876, November 2024. [doi]

OUT-Free OperationsXiongjie Zhang, Qiaobo Ma, Yang Jiang 0002, Anyang Zhao, Man Kay Law, Rui Paulo Martins, Pui-In Mak. jssc, 59(4):1078-1092, April 2024. [doi]

A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization CharacteristicsXiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang 0002, Man Kay Law, Rui Paulo Martins, Pui-In Mak. jssc, 59(9):2895-2906, September 2024. [doi]

A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime ControlXiongjie Zhang, Xinman Li, Anyang Zhao, Yang Jiang 0002, Weihang Zhang, JinCheng Zhang, Rui Paulo Martins, Pui-In Mak. tcasII, 71(5):2579-2583, May 2024. [doi]

One-Cycle-Startup Relaxation Oscillator Using Ratiometric Threshold-Referenced and Self-Synchronized Power Gating TechniquesGuangshu Zhao, Zhiming Xiao, Pui-In Mak, Rui Paulo Martins, Man Kay Law. tcasII, 71(1):56-60, January 2024. [doi]

T in 65-nm CMOSYa Zhao, Chao Fan, Yuanxing Peng, Chenglong Liang, Jun Yin 0001, Pui-In Mak, Li Geng. tcasII, 71(5):2604-2608, May 2024. [doi]

Analysis and Design of a 21.2-to-25.5-GHz Triple-Coil Transformer-Coupled QVCOYa Zhao, Chao Fan, Jun Yin 0001, Pui-In Mak, Li Geng. tcasI, 71(10):4538-4549, October 2024. [doi]

A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°CGuangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang 0002, Milin Zhang 0001, Pui-In Mak, Rui Paulo Martins, Man Kay Law. cicc 2024: 1-2 [doi]

2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10 MHz and 200.7dBc/Hz FoMA in 65nm CMOSYa Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng. isscc 2024: 354-356 [doi]

Miniature Magnetic Resonance Imaging System for in situ Monitoring of Bacterial Growth and Biofilm FormationQi Zhou, Shuhao Fan, Ka-Meng Lei, Donhee Ham, Rui Paulo Martins, Pui-In Mak. tbcas, 18(5):990-1000, October 2024. [doi]

2023

2 Voltage Reference in 65-nm CMOS Exploiting Well-Proximity EffectChengyu Che, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. tcasII, 70(10):3822-3826, October 2023. [doi]

A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy HarvestingAlexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen 0005, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins. tvlsi, 31(8):1253-1257, August 2023. [doi]

A High-PCE Range-Extension CMOS Rectifier Employing Advanced Topology Amalgamation Technique for Ambient RF Energy HarvestingAlexander Choo Chia Chun, Yi-Chen Lee, Harikrishnan Ramiah, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. tcasII, 70(10):3747-3751, October 2023. [doi]

3 Field of ViewShuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins. jssc, 58(7):2028-2039, 2023. [doi]

An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$Hao Guo, Yong Chen 0005, Yunbo Huang, Pui-In Mak, Rui Paulo Martins. isscc 2023: 152-153 [doi]

RMS Jitter, -260.2-dB FOM, and -70.96-dBc Reference SpurYunbo Huang, Yong Chen 0005, Bo Zhao 0003, Pui-In Mak, Rui Paulo Martins. tcasI, 70(4):1463-1475, April 2023. [doi]

Universal Stability Criterion for Type-I Sampling Phase-Locked LoopsYunbo Huang, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. tcasII, 70(4):1351-1355, April 2023. [doi]

RMSJitter, -258.7-dB FOM, and -75.17-dBc Reference SpurYunbo Huang, Yong Chen 0005, Bo Zhao, Pui-In Mak, Rui Paulo Martins. tvlsi, 31(2):188-198, February 2023. [doi]

A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based TrimmingYunbo Huang, Yong Chen 0005, Kaiyuan Yang 0001, Paolo Crovetti, Pui-In Mak, Rui Paulo Martins. tcasII, 70(11):3950-3954, November 2023. [doi]

A Flexible Rooftop Photovoltaic-Inductive Wireless Power Transfer System for Low-Voltage DC GridIo-Wa Iam, Zhaoyi Ding, Zhicong Huang, Chi-Seng Lam, Rui Paulo Martins, Pui-In Mak. access, 11:51117-51132, 2023. [doi]

2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer InterfacesMoon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore. vlsit 2023: 1-2 [doi]

Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A ReviewLi-Fang Lai, Harikrishnan Ramiah, Tan Yee Chyan, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. access, 11:85237-85258, 2023. [doi]

High-Performance Multiband Ambient RF Energy Harvesting Front-End System for Sustainable IoT Applications - A ReviewYi-Chen Lee, Harikrishnan Ramiah, Alexander Choo Chia Chun, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. access, 11:11143-11164, 2023. [doi]

A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup TimeHaihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins. isscc 2023: 64-65 [doi]

A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN ClassifierJinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins. isscc 2023: 214-215 [doi]

An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOSLiwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins. ojcands, 4:126-138, 2023. [doi]

A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROMJinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak. jssc, 58(11):3020-3029, November 2023. [doi]

2 Peak Current DensityQiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang 0002, Man Kay Law, Rui Paulo Martins, Pui-In Mak. asscc 2023: 1-3 [doi]

L Reduction for 12 V/24 V InputsQiaobo Ma, Xiongjie Zhang, Anyang Zhao, Huihua Li, Yang Jiang 0002, Man Kay Law, Makoto Takamiya, Rui Paulo Martins, Pui-In Mak. tcasI, 70(12):5482-5495, December 2023. [doi]

Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise UpconversionXi Meng, Haoran Li, Peng Chen 0022, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins. tcasI, 70(12):5110-5123, December 2023. [doi]

A 0.5-to-1.5GHz BW-Extended Gain-Boosted N-Path Filter Using a Switched $\mathbf{g}_{\mathbf{m}}-\mathbf{C}$ Network Achieving 50MHz BW and 18.2dBm OB-IIP3Gengzhen Qi, Pui-In Mak. asscc 2023: 1-3 [doi]

A 27-dBm, 0.92-GHz CMOS Power Amplifier With Mode Switching and a High-Q Compact Inductor (HQCI) Achieving a 30% Back-Off PAEArvind Singh Rawat, Jagadheswaran Rajendran, Selvakumar Mariappan, Narendra Kumar, Pui-In Mak, Rui Paulo Martins. tcasII, 70(1):121-125, 2023. [doi]

Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLLDan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. icta3 2023: 1-2 [doi]

2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC NetworkYuchen Wei, Shiheng Yang, Yueduo Liu, Rongxin Bao, Zihao Zhu, Jiahui Lin, Zehao Zhang, Yong Chen 0005, Jun Yin 0001, Pui-In Mak, Qiang Li 0021. tvlsi, 31(8):1248-1252, August 2023. [doi]

2Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang 0002, Pui-In Mak, Rui Paulo Martins, Man Kay Law. asscc 2023: 1-3 [doi]

Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With200 Million Training CRPsChongyao Xu, Jieyun Zhang, Man Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins. tifs, 18:2188-2203, 2023. [doi]

Modeling-Attack-Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved ReliabilityChongyao Xu, Litao Zhang, Man Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins. iotj, 10(18):16300-16315, September 2023. [doi]

A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting ApplicationJack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. access, 11:97641-97653, 2023. [doi]

A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHzXiangxun Zhan, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins. isscc 2023: 148-149 [doi]

3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free OperationXiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang 0002, Man Kay Law, Pui-In Mak, Rui Paulo Martins. vlsit 2023: 1-2 [doi]

An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition ApplicationsZhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins. tcasII, 70(1):281-285, 2023. [doi]

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