Table of Contents

• ReflectionsLaura Chizuko Fujino. 4 [doi]
• Foreword: Building on 70 Years of Innovation in Solid-State Circuit DesignPiet Wambacq. 5 [doi]
• Innovation For the Next Decade of Compute EfficiencyLisa Su, Sam Naffziger. 8-12 [doi]
• Shape the World with Mixed-Signal Integrated Circuits - Past, Present, and FutureAkira Matsuzawa. 13-22 [doi]
• EU Ships Act Drives Pan-European Full-Stack Innovation PartnershipsJo De Boeck, Jean-René Léquepeys, Christoph Kutter. 26-32 [doi]
• 5G Drives Exponential Increase in Processing Needs Across all IndustriesErik Ekudden. 33-35 [doi]
• "Zen 4": The AMD 5nm 5.7GHz x86-64 Microprocessor CoreBenjamin Munger, Kathy Wilcox, Jeshuah Sniderman, Chuck Tung, Brett Johnson, Russell Schreiber, Carson Henrion, Kevin Gillespie, Tom Burd, Harry R. Fair III, Dave Johnson 0002, Jonathan White, Scott McLelland, Steven Bakke, Javin Olson, Ryan McCracken, Matthew Pickett, Aaron Horiuchi, Hien Nguyen, Tim Jackson. 38-39 [doi]
• A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFETBo-Jr Huang, Alfred Tsai, Lear Hsieh, Kathleen Chang, C.-J. Tsai, Jia-Ming Chen, Eric Jia-Wei Fang, Sung S.-Y. Hsueh, Jack Ciao, Barry Chen, Chuck Chang, Ping Kao, Ericbill Wang, Harry H. Chen, Hugh Mair, Shih-Arn Hwang. 40-41 [doi]
• Amorphica: 4-Replica 512 Fully Connected Spin 336MHz Metamorphic Annealer with Programmable Optimization Strategy and Compressed-Spin-Transfer Multi-Chip ExtensionKazushi Kawamura, Jaehoon Yu, Daiki Okonogi, Satoru Jimbo, Genta Inoue, Akira Hyodo, Ángel López García-Anas, Kota Ando, Bruno Hideki Fukushima-Kimura, Ryota Yasudo, Thiem Van Chu, Masato Motomura. 42-43 [doi]
• A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation SequencingYen-Lung Chen, Chung-Hsuan Yang, Yi-Chung Wu, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang. 44-45 [doi]
• A 28nm 142mW Motion-Control SoC for Autonomous Mobile RobotsI-Ting Lin, Zih-Sing Fu, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang. 46-47 [doi]
• VISTA: A 704mW 4K-UHD CNN Processor for Video and Image Spatial/Temporal Interpolation AccelerationKai-Ping Lin, Jia-Han Liu, Jyun-Yi Wu, Hong-Chuan Liao, Chao-Tsung Huang. 48-49 [doi]
• MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile DevicesDonghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo. 50-51 [doi]
• A 120.9dB DR, -111.2dB THD+N Digital-Input Capacitively-Coupled Chopper Class-D Audio AmplifierHuajun Zhang, Marco Berkhout, Kofi A. A. Makinwa, Qinwen Fan. 54-55 [doi]
• A Chopper-Stabilized Amplifier with a Relaxed Fill-In Technique and 22.6pA Input CurrentThije Rooijers, Johan H. Huijsing, Kofi A. A. Makinwa. 56-57 [doi]
• Bandpass Filter and Oscillator ICs with THD ppd for Testing High-Resolution ADCsSubha Sarkar, Rajat Agarwal, Nagendra Krishnapura. 58-59 [doi]
• 2 10MHz RC Frequency Reference with a 1-Point On-Chip-Trimmed Inaccuracy of $\boldsymbol{\pm 0.28\%}$ from $\boldsymbol{-45^{\mathrm{o}}\mathrm{C}}$ to $\boldsymbol{125^{\mathrm{o}}\mathrm{C}}$ in 0.18μm CMOSXiaomeng An, Sining Pan, Hui Jiang, Kofi A. A. Makinwa. 60-61 [doi]
• A $1.4\mu$ W/MHz 100MHz RC Oscillator with $\pm$ 1030ppm Inaccuracy from $-40^{\circ}\mathrm{C}$ to $85^{\circ}\mathrm{C}$ After Accelerated Aging for 500 Hours at $125^{\circ}\mathrm{C}$Kyu-Sang Park, Nilanjan Pal, Yongxin Li, Ruhao Xia, Tianyu Wang 0006, Ahmed E. AbdelRahman, Pavan Kumar Hanumolu. 62-63 [doi]
• A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup TimeHaihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins. 64-65 [doi]
• 4ppm-ΔF Injection Using Automatic Phase-Error Correction TechniqueZhikuang Cai, Xin Wang, Zixuan Wang, Yunjin Yin, Wenjing Zhang, Tailong Xu, Yufeng Guo. 66-67 [doi]
• A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection ControlYihan Zhang, You You, Wenjie Ren, Xinhang Xu, Linxiao Shen, Jiayoon Ru, Ru Huang, Le Ye. 68-69 [doi]
• A 0.5-to-400MHz Programmable BAW Oscillator with Fractional Output Divider Achieving 4ppm Frequency Stability over Temperature and <95fs JitterSubhashish Mukherjee, Yogesh Darwhekar, Jayawardan Janardhanan, Peeyoosh Mirajkar, Raghavendra Reddy, Harish Ramesh, Bichoy Bahr, Jagdish Chand, Uday Meda, Baher Haroun, Shankar Karantha, Ernest Ting-Ta Yen, Keegan Martin, Daniel Gan, Amin Sijelmassi, Sankaran Aniruddhan. 70-71 [doi]
• A 16GHz, $41\text{kHz}_{\text{rms}}$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLLPratap Tumkur Renukaswamy, Kristof Vaesen, Nereo Markulic, Veerle Derudder, Dae-Woong Park, Piet Wambacq, Jan Craninckx. 74-75 [doi]
• A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency MultiplierYongwoo Jo, Juyeop Kim, Yuhwan Shin, Chanwoong Hwang, Hangi Park, Jaehyouk Choi. 76-77 [doi]
• A 76.7fs-lntegrated-Jitter and -71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive DitheringSimone Mattia Dartizio, Francesco Tesolin, Giacomo Castoro, Francesco Buccoleri, Luca Lanzoni, Michele Resson, Dmytro Cherniak, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. 78-79 [doi]
• A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain CalibrationJunjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang, Ashbir Aviat Fadila, Zezheng Liu, Waleed Madany, Yuang Xiong, Atsushi Shirane, Kenichi Okada. 80-81 [doi]
• A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC TopologyGiacomo Castoro, Simone Mattia Dartizio, Francesco Tesolin, Francesco Buccoleri, Michele Rossoni, Dmytro Cherniak, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. 82-83 [doi]
• A $47\text{fs}_{\text{rms}}$-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector and Extended Loop BandwidthJooeun Bang, Jaeho Kim, Seohee Jung, Suneui Park, Jaehyouk Choi. 84-85 [doi]
• A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference SpurZhao Zhang 0004, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu 0021, Yong Chen, Nanjian Wu, Liyuan Liu. 86-87 [doi]
• A 3-Wafer-Stacked Hybrid 15MPixel CIS + 1 MPixel EVS with 4.6GEvent/s Readout, In-Pixel TDC and On-Chip ISP and ESP FunctionMenghan Guo, Shoushun Chen, Zhe Gao, Wenlei Yang, Peter Bartkovjak, Qing Qin, Xiaoqin Hu, Dahei Zhou, Masayuki Uchiyama, Shimpei Fukuoka, Chengcheng Xu, Hiroaki Ebihara, Andy Wang, Peiwen Jiang, Bo Jiang, Bo Mu, Huan Chen, Jason Yang, TJ Dai, Andreas Suess, Yoshiharu Kudo. 90-91 [doi]
• 1.22μm 35.6Mpixel RGB Hybrid Event-Based Vision Sensor with 4.88μm-Pitch Event Pixels and up to 10K Event Frame Rate by Adaptive Control on Event SparsityKazutoshi Kodama, Yusuke Sato, Yuhi Yorikado, Raphael Berner, Kyoji Mizoguchi, Takahiro Miyazaki, Masahiro Tsukamoto, Yoshihisa Matoba, Hirotaka Shinozaki, Atsumi Niwa, Tetsuji Yamaguchi, Christian Brandli, Hayato Wakabayashi, Yusuke Oike. 92-93 [doi]
• A 2.97μm-Pitch Event-Based Vision Sensor with Shared Pixel Front-End Circuitry and Low-Noise Intensity Readout ModeAtsumi Niwa, Futa Mochizuki, Raphael Berner, Takuya Maruyarma, Toshio Terano, Kenichi Takamiya, Yasutaka Kimura, Kyoji Mizoguchi, Takahiro Miyazaki, Shun Kaizu, Hirotsugu Takahashi, Atsushi Suzuki, Christian Brandli, Hayato Wakabayashi, Yusuke Oike. 94-95 [doi]
• A 0.64μm 4-Photodiode 1.28μm 50Mpixel CMOS Image Sensor with 0.98e- Temporal Noise and 20Ke- Full-Well Capacity Employing Quarter-Ring Source-FollowerHyuncheol Kim, Yun Hyeok Kim, Sanghyuck Moon, Hwanwoong Kim, Byeongjun Yoo, JuEun Park, Seyoung Kim, June Mo Koo, Sewon Seo, Hye Ji Shin, Younghwan Choi, Jinwoo Kim, Kyungil Kim, Jae-Hoon Seo, Seunghyun Lim, Taesub Jung, Howoo Park, Sangil Jung, Juhyun Ko, Kyungho Lee, JungChak Ahn, JoonSeo Yim. 96-97 [doi]
• A 16.4kPixel 3.08-to-3.86THz Digital Real-Time CMOS Image Sensor with 73dB Dynamic RangeMin Liu, Ziteng Cai, Shaohua Zhou, Man Kay Law, Jian Liu 0021, Jianguo Ma, Nanjian Wu, Liyuan Liu. 98-99 [doi]
• A 400 $\times$ 200 600fps 117.7dB-DR SPAD X-Ray Detector with Seamless Global Shutter and Time-Encoded Extrapolation CounterByungchoul Park, Byungwook Ahn, Hyun-Seung Choi, Jinwoong Jeong, Kangmin Hwang, Taewoo Kim, Myung-Jae Lee, Youngcheol Chae. 100-101 [doi]
• 55pW/pixel Peak Power Imager with Near-Sensor Novelty/Edge Detection and DC-DC Converter-Less MPPT for Purely Harvested Sensor NodesKarim Ali Ahmed, Hayate Okuhara, Massimo Alioto. 102-103 [doi]
• Dual-Port CMOS Image Sensor with Regression-Based HDR Flux-to-Digital Conversion and 80ns Rapid-Update Pixel-Wise Exposure CodingRahul Gulve, Roberto Rangel, Ayandev Barman, Don Nguyen, Mian Wei, Motasem Sakr, Xiaonong Sun, David B. Lindell, Kiriakos N. Kutulakos, Roman Genov. 104-105 [doi]
• A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET TechnologyBo Zhang 0029, Anand Vasani, Ashutosh Sinha, Alireza Nilchi, Haitao Tong, Lakshmi P. Rao, Karapet Khanoyan, Hamid Hatamkhani, Xiaochen Yang, Xin Meng, Alexander Wong, Jun Kim, Ping Jing, Yehui Sun, Ali Nazemi, Dean Liu, Anthony Brewster, Jun Cao 0001, Afshin Momtaz. 108-109 [doi]
• A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFETHenry Park, Mohammed Abdullatif, Ehung Chen, Ahmed Elmallah, Qaiser Nehal, Miguel Gandara, Tsz-Bin Liu, Amr Khashaba, Joonyeong Lee, Chih Yi Kuan, Dhinessh Ramachandran, Ruey-Bo Sun, Atharav Atharav, Yusang Chun, Mantian Zhang, Deng-Fu Weng, Chung-Hsien Tsai, Chen-Hao Chang, Chia-Sheng Peng, Sheng-Tsung Hsu, Tamer A. Ali 0001. 110-111 [doi]
• A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOSBingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, YanDong He. 112-113 [doi]
• A 4nm 32Gb/s 8Tb/s/mm Die-to-Die Chiplet Using NRZ Single-Ended Transceiver With Equalization Schemes And Training TechniquesKihwan Seong, Donguk Park, Gyeom-Je Bae, HyunWoo Lee, Youngseob Suh, Wooseuk Oh, Hyemun Lee, Juyoung Kim, Takgun Lee, Geonhoo Mo, Sukhyun Jung, Dongcheol Choi, Byoung-Joo Yoo, Sanghune Park, Hyo-Gyuem Rhew, Jongshin Shin. 114-115 [doi]
• A 37.8dB Channel Loss 0.6μs Lock Time CDR with Flash Frequency Acquisition in 5nm FinFETChien-Kai Kao, Shih-Che Hung, Tse-Hsien Yeh, Chen-Yu Hsiao. 116-117 [doi]
• A 0.83pJ/b 52Gb/s PAM-4 Baud-Rate CDR with Pattern-Based Phase Detector for Short-Reach ApplicationsSeungwoo Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Hyunsu Park, Youngwook Kwon, Chulwoo Kim. 118-119 [doi]
• A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOSKai Sheng, Weixin Gai, Zeze Feng, Haowei Niu, Bingyi Ye, Hang Zhou. 120-121 [doi]
• A 100Gb/s 1.6Vppd PAM-8 Transmitter with High-Swing $\mathbf{3+1}$ Hybrid FFE Taps in 40nmJeonghyu Yang, Eunji Song, Seungwook Hong, Dongjun Lee, Sangwan Lee, Hyunwoo Im, Tae-ho Shin, Jaeduk Han. 122-123 [doi]
• A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge DevicesPing-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 126-127 [doi]
• A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNsAn Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang. 128-129 [doi]
• A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network InferenceYifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu. 130-131 [doi]
• A 4nm 6163-TOPS/W/b $\mathbf{4790-TOPS/mm^{2}/b}$ SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight UpdateHaruki Mori, Wei-Chang Zhao, Cheng-En Lee, Chia-Fu Lee, Yu-Hao Hsu, Chao-Kai Chuang, Takeshi Hashizume, Hao-Chun Tung, Yao-Yi Liu, Shin-Rung Wu, Kerem Akarvardar, Tan-Li Chou, Hidehiro Fujiwara, Yih Wang, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang. 132-133 [doi]
• A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-NetworksBo Wang, Chen Xue, Zhongyuan Feng, Zhaoyang Zhang, Han Liu, Lizheng Ren, Xiang Li, Anran Yin, Tianzhu Xiong, Yeyang Xue, Shengnan He, Yuyao Kong, Yongliang Zhou, An Guo, Xin Si, Jun Yang 0006. 134-135 [doi]
• A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing RelaxationSung-En Hsieh, Chun-Hao Wei, Cheng-Xin Xue, Hung-Wei Lin, Wei-Hsuan Tu, En-Jui Chang, Kai-Taing Yang, Po-Heng Chen, Wei-Nan Liao, Li Lian Low, Chia-Da Lee, Allen-CL Lu, Jenwei Liang, Chih-Chung Cheng, Tzung-Hung Kang. 136-137 [doi]
• CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume ConstructionZhiheng Yue, Yang Wang, Huizheng Wang, Yabing Wang, Ruiqi Guo, Limei Tang, Leibo Liu, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 138-139 [doi]
• A 22nm Delta-Sigma Computing-In-Memory (Δ∑CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI ProcessingPeiyu Chen, Meng Wu, Wentao Zhao, Jiajia Cui, Zhixuan Wang, Yadong Zhang, Qijun Wang, Jiayoon Ru, Linxiao Shen, Tianyu Jia, Yufei Ma 0002, Le Ye, Ru Huang. 140-141 [doi]
• CTLE-Ising:A 1440-Spin Continuous-Time Latch-Based isling Machine with One-Shot Fully-Parallel Spin Updates Featuring Equalization of Spin StatesJooyoung Bae, Wonsik Oh, Jahyun Koo, Bongjin Kim. 142-143 [doi]
• An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation TechniqueQixiu Wu, Wei Deng 0001, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang 0001, Baoyong Chi. 146-147 [doi]
• A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHzXiangxun Zhan, Jun Yin 0001, Pui-In Mak, Rui Paulo Martins. 148-149 [doi]
• A 28GHz Scalable Inter-Core-Shaping Multi-Core Oscillator with DM/CM-Configured Coupling Achieving 193.3dBc/Hz FoM and 205.5dBc/Hz FoMA at 1MHz OffsetYiyang Shu, Zhixian Deng, Xun Luo. 150-151 [doi]
• An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$Hao Guo, Yong Chen 0005, Yunbo Huang, Pui-In Mak, Rui Paulo Martins. 152-153 [doi]
• D1: A 7nm ML Training Processor with Wave Clock DistributionTim C. Fischer, Anantha Kumar Nivarti, Raghuvir Ramachandran, Ram Bharti, Derek Carson, Anton Lawrendra, Vineet Mudgal, Vivek Santhosh, Sunil Shukla, Te-Chen Tsai. 156-157 [doi]
• A 1mW Always-on Computer Vision Deep Learning Neural Decision ProcessorDavid Garrett, Youn Sung Park, Seongjong Kim, Jay Sharma, Wenbin Huang, Majid Shaghaghi, Vinay Parthasarathy, Stephen Gibellini, Stephen Bailey, Mallik Moturi, Pieter Vorenkamp, Kurt Busch, Jeremy Holleman, Behrooz Javid, Alireza Yousefi, Mohsen Judy, Atul Gupta. 158-159 [doi]
• NVLink-C2C: A Coherent Off Package Chip-to-Chip Interconnect with 40Gbps/pin Single-ended SignalingYing Wei, Yi-Chieh Huang, Haiming Tang, Nithya Sankaran, Ish Chadha, Dai Dai, Olakanmi Oluwole, Vishnu Balan, Edward Lee. 160-161 [doi]
• An In-depth Look at the Intel IPU E2000Naru Sundar, Brad Burres, Yadong Li, Dave Minturn, Brian Johnson, Nupur Jain. 162-163 [doi]
• A 1.8GHz 12b Pre-Sampling Pipelined ADC with Reference Buffer and OP Power RelaxationsSung-En Hsieh, Tzu-Chien Wu, Chun-Chih Hou. 166-167 [doi]
• A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT RobustnessJunyan Hao, Minglei Zhang, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 168-169 [doi]
• A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain QuantizerYuefeng Cao, Minglei Zhang, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 170-171 [doi]
• A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-ShiftingManxin Li, Calvin Yoji Lee, Ahmed ElShater, Yuichi Miyahara, Kazuki Sobue, Koji Tomioka, Un-Ku Moon. 172-173 [doi]
• nd-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-Prediction-Unrolled SchemeHongshuai Zhang, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 174-175 [doi]
• A 150kHz-BW 15-ENOB Incremental Zoom ADC with Skipped Sampling and Single Buffer Embedded Noise-Shaping SAR QuantizerZongnan Wang, Lu Jie, Zichen Kong, Mingtao Zhan, Yi Zhong, Yuan Wang 0001, Xiyuan Tang. 176-177 [doi]
• th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error ShapingYanbo Zhang, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 178-179 [doi]
• A Scalable Heterogeneous Integrated Two-Stage Vertical Power-Delivery Architecture for High-Performance ComputingCasey Hardy, Hieu Pham, Mohamed Mehdi Jatlaoui, Frederic Voiron, Tianshi Xie, Po-Han Chen, Saket Jha, Patrick Mercier, Hanh-Phuc Le. 182-183 [doi]
• 3 Power Density at 85% EfficiencyTingxu Hu, Mo Huang, Yan Lu 0002, Rui Paulo Martins. 184-185 [doi]
• A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-BoostSuhwan Kim, Harish K. Krishnamurthy, Sergey Sofer, Sheldon Weng, Shahar Wolf, Ashoke Ravi, Krishnan Ravichandran, Ofir Degani, James W. Tschanz, Vivek De. 186-187 [doi]
• A Double Step-Down Dual-Output Converter with Cross Regulation of 0.025mV/mA and Improved Current BalanceWei-Chieh Hung, Cheng-Wen Chen, Yu-Wei Huang, An Chen, Zhen-Yu Yang, Ke-Horng Chen, Kuo-Lin Zhenq, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Wei-Cheng Huang. 188-189 [doi]
• A 21W 94.8%-Efficient Reconfigurable Single-Inductor Multi-Stage Hybrid DC-DC ConverterCasey Hardy, Hanh-Phuc Le. 190-191 [doi]
• A 42W Reconfigurable Bidirectional Power Delivery Voltage-Regulating CableZhiguo Tong, Junwei Huang, Yan Lu 0002, Rui Paulo Martins. 192-193 [doi]
• A Wide 0.1-to-10 Conversion-Ratio Symmetric Hybrid Buck-Boost Converter for USB PD Bidirectional ConversionCheng Lin, Chieb-Sheng Hung, Si-Yi Li, Ya-Ting Hsu, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 194-195 [doi]
• A 5A 94.5% Peak Efficiency 9~16V-to-1V Dual-Path Series-Capacitor Converter with Full Duty Range and Low V.A MetricXu Yang, Linhu Zhao, Menglian Zhao, Zhichao Tan, Yong Ding 0003, Wuhua Li, Wanyuan Qu. 196-197 [doi]
• A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck ConverterGuigang Cai, Yan Lu 0002, Rui Paulo Martins. 198-199 [doi]
• A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC ConverterWen-Liang Zeng, Guigang Cai, Chon-Fai Lee, Chi-Seng Lam, Yan Lu 0002, Sai-Weng Sin, Rui Paulo Martins. 200-201 [doi]
• A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic DiesMayank Raj, Chuan Xie, Ade Bekele, Adam Chou, Wenfeng Zhang, Ying Cao 0010, Jae Wook Kim, Nakul Narang, Hongyuan Zhao, Yipeng Wang 0003, Kee Hian Tan, Winson Lin, Jay Im, David Mahashin, Santiago Asuncion, Parag Upadhyaya, Yohan Frans. 204-205 [doi]
• A 7 pA/$\surd\text{Hz}$ Asymmetric Differential TIA for 100Gb/s PAM-4 links with -14dBm Optical Sensitivity in 16nm CMOSKadaba Lakshmikumar, Alexander Kurylak, Romesh Kumar Nandwana, Bibhu Das, Joe Pampanin, Mike Brubaker, Pavan Kumar Hanumolu. 206-207 [doi]
• A Carrier-Phase-Recovery Loop for a 3.2pJ/b 24Gb/s QPSK Coherent Optical ReceiverAhmed E. AbdelRahman, Mostafa Gamal Ahmed, Mahmoud A. Khalil, Mohamed Badr Younis, Kyu-Sang Park, Pavan Kumar Hanumolu. 208-209 [doi]
• Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power GatingYuto Yakubo, Kazuma Furutani, Kouhei Toyotaka, Haruki Katagiri, Masashi Fujita, Munehiro Kozuma, Yoshinori Ando, Yoshiyuki Kurokawa, Toru Nakura, Shunpei Yamazaki. 212-213 [doi]
• A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN ClassifierJinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins. 214-215 [doi]
• A Triturated Sensing SystemNoriyuki Miura, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Tetsuya Hirose, Takaaki Okidono, Takuji Miki, Makoto Nagata. 216-217 [doi]
• A Self-Programming PUF Harvesting the High-Energy Plasma During FabricationKotaro Naruse, Takayuki Ueda, Jun Shiomi, Yoshihiro Midoh, Noriyuki Miura. 218-219 [doi]
• Subtractive Photonic Waveguide-Coupled Photodetectors in 180nm Bulk CMOSCraig Ives, Ali Hajimiri. 220-221 [doi]
• A Silicon Photonic Reconfigurable Optical Analog Processor (SiROAP) with a 4x4 Optical MeshMd Jubayer Shawon, Vishal Saxena. 222-223 [doi]
• A Fractional-N Digital MDLL with Injection-Error Scrambling and Background Third-Order DTC Delay Equalizer Achieving -67dBc Fractional SpurQiaochu Zhang, Hsiang-Chun Cheng, Shiyu Su, Mike Shuo-Wei Chen. 226-227 [doi]
• nd-Order DTC INL CalibrationYumeng Yang, Wei Deng 0001, Angxiao Yan, Haikun Jia, Junlong Gong, Zhihua Wang 0001, Baoyong Chi. 228-229 [doi]
• 2 Power Density and Autonomous Bypass ModeMichael Zelikson, Kosta Luria, Lior Gil, Yuval Brown, Vadim Goldenbeg, Dor Kasif, Elias Hlees, Alex Vinichuk. 230-231 [doi]
• 2Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC ConverterNicolas Butzen, Harish Krishnamurthy, Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James W. Tschanz, Jonathan Douglas. 232-233 [doi]
• A Self-Powered SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for System-in-FiberXinjian Liu, Daniel S. Truesdell, Omar Faruqe, Lalitha Parameswaran, Michael Rickley, Andrew Kopanski, Lauren Cantley, Austin Coon, Matthew Bernasconi, Tairan Wang, Benton H. Calhoun. 236-237 [doi]
• A 2.19µW Self-Powered SoC with Integrated Multimodal Energy Harvesting, Dual-Channel up to -92dBm WRX and Energy-Aware SubsystemChristopher J. Lukas, Farah B. Yahya, Kuo-Ken Huang, Jim Boley, Daniel S. Truesdell, Jacob Breiholz, Atul Wokhlu, Kyle Craig, Jonathan K. Brown, Andrew Fitting, William Moore, Andy Shih, Alice Wang, Alain Gravel, David D. Wentzloff, Benton H. Calhoun. 238-239 [doi]
• A 33kDMIPS 6.4W Vehicle Communication Gateway Processor Achieving 10Gbps/W Network Routing, 40ms CAN Bus Start-Up and 1.4mW Standby PowerKenichi Shimada, Keiichiro Sano, Kazuki Fukuoka, Hiroshi Morita, Masayuki Daito, Tatsuya Kamei, Hiroyuki Hamasaki, Yasuhisa Shimazaki. 240-241 [doi]
• A 28nm 68MOPS 0.18\mu\mathrm{J}/\text{Op}$ Paillier Homomorphic Encryption Processor with Bit-Serial Sparse Ciphertext ComputingGuiming Shi, Zhanhong Tan, Dapeng Cao, Jingwei Cai, Wuke Zhang, Yifu Wu, Kaisheng Ma. 242-243 [doi]
• A 100Gbps Fault-Injection Attack Resistant AES-256 Engine with 99.1-to-99.99% Error Coverage in Intel 4 CMOSRaghavan Kumar, Avinash Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu Mathew. 244-245 [doi]
• MuITCIM: A 28nm $2.24 \mu\mathrm{J}$/Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal TransformersFengbin Tu, Zihan Wu 0006, Yiqi Wang, Weiwei Wu, Leibo Liu, Yang Hu 0001, Shaojun Wei, Shouyi Yin. 248-249 [doi]
• A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable EngineShiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu. 250-251 [doi]
• A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital ArchitectureJinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang 0014, Huazhong Yang, Yongpan Liu, Ming Liu 0022. 252-253 [doi]
• TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN AccelerationFengbin Tu, Yiqi Wang 0005, Zihan Wu 0006, Weiwei Wu, Leibo Liu, Yang Hu 0001, Shaojun Wei, Shouyi Yin. 254-255 [doi]
• DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource SwitchingSangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo. 256-257 [doi]
• A Nonvolatile Al-Edge Processor with 4MB SLC-MLC Hybrid-Mode ReRAM Compute-in-Memory Macro and 51.4-251TOPS/WWei-Hsing Huang, Tai-Hao Wen, Je-Min Hung, Win-San Khwa, Yun-Chen Lo, Chuan-Jia Jhang, Huna-Hsi Hsu, Yu-Hsiana Chin, Yu-Chiao Chen, Chuna-Chuan Lo, Ren-Shuo Liu, Kea-Tiong Tang, Chih-Cheng Hsieh, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang. 258-259 [doi]
• A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge ApplicationsGiuseppe Desoli, Nitin Chawla, Thomas Boesch, Manui Avodhyawasi, Harsh Rawat, Hitesh Chawla, VS Abhijith, Paolo Zambotti, Akhilesh Sharma, Carmine Cappetta, Michele Rossi, Antonio De Vita, Francesca Girardi. 260-261 [doi]
• A 2x-lnterleaved 9b 2.8G8S/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz InputHongzhi Zhao, Minglei Zhang, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 264-265 [doi]
• An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-LatchesSerdar A. Yonar, Pier Andrea Francese, Matthias Brändli, Marcel A. Kossel, Mridula Prathapan, Thomas Morf, Andrea Ruffino, Taekwang Jang. 266-267 [doi]
• A 14b 16GS/s Time-Interleaving Oirect-RF Synthesis OAe with T-OEM Achieving -70dBc IM3 up to 7.8GHz in 7nmWei-Hsin Tseng, Willy Lin, Chung-Wei Hsu, Chang-Yang Huang, Yu-Sian Lin, Hung-Yi Huang, HsinWei Chen, Sheng-hui Liao, Kuan-Dar Chen, Jon Strange, Gabriele Manganaro. 268-269 [doi]
• A 750mW 24GS/s 12b Time-Interleaved ADC for Direct RF Sampling in Modern Wireless SystemsSandeep Santhosh Kumar, Masahiro Kudo, Vlad Cretu, Antoine Morineau, Atsushi Matsuda, Minori Yoshida, Masazumi Marutani, Aadil Hussain Maniyar, Jay Kumar. 270-271 [doi]
• A 10mW 10-ENOB 1GS/s Ring-Amp-Based Pipelined TI-SAR ADC with Split MDAC and Switched Reference Decoupling CapacitorMingtao Zhan, Lu Jie, Nan Sun. 272-273 [doi]
• A 7b 4.5GS/s 4× Interleaved SAR ADC with Fully On-Chip Background Timing Skew CalibrationYi-Hu Wang, Soon-Jyh Chang. 274-275 [doi]
• A 3mW 2.7GS/s 8b Subranging ADC with Multiple-Reference-Reference-Embedded ComparatorsJia-Ching Wang, Tai-Haur Kuo. 276-277 [doi]
• A Single-Channel 10GS/s 8b>36.4d8 SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive Approximation in 28nm CMOSOian Chen, Yuan Liang, Chirn Chye Boon, Oing Liu. 278-279 [doi]
• A W-Band Transceiver Array with 2.4GHz LO Synchronization Enabling Full Scalability for FMCW RadarJingzhi Zhang, Ajay Singhvi, Sherif S. Ahmed, Amin Arbabian. 282-283 [doi]
• A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFETAbhishek Agrawal, Amy Whitcombe, Woorim Shin, Ritesh Bhat, Somnath Kundu, Peter Sagazio, Hariprasad Chandrakumar, Thomas W. Brown, Brent R. Carlton, Christopher D. Hull, Steven Callender, Stefano Pellerano. 284-285 [doi]
• 71-to-89GHz 12Gb/s Double-Edge-Triggered Quadrature RFDAC with LO Leakage Suppression Achieving 20.5dBm Peak Output Power and 20.4% System EfficiencyBingzheng Yang, Zhixian Deng, Huizhen Jenny Qian, Xun Luo. 286-287 [doi]
• A $4\times 4$ 607GHz Harmonic Injection-Locked Receiver Array Achieving $4.4\text{pW}/\surd\text{Hz}$ NEP in 28nm CMOSAriane De Vroede, Patrick Reynaert. 288-289 [doi]
• A 300MHz-BW, 27-to-38dBm In-Band OIP3 sub-7GHz Receiver for 5G Local Area Base Station ApplicationsMohammad Ali Montazerolghaem, Leo C. N. de Vreede, Masoud Babaie. 292-293 [doi]
• rd-Harmonic Blocker P1dB for 5G NR ApplicationsSoroush Araei, Shahabeddin Mohin, Negar Reiskarimian. 294-295 [doi]
• A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite ConstellationXi Fu, Dongwon You, Xiaolin Wang, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashibir Aviat Fadila, Zheng Li, Yun Wang, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane. 296-297 [doi]
• A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active CouplerDongwon You, Xi Fu, Xiaolin Wang, Yuan Gao, Wenqian Wang, Jun Sakamaki, Hans Herdian, Sena Kato, Michihiro Ide, Yuncheng Zhang, Ashbir Aviat Fadila, Zheng Li, Chun Wang, Yun Wang, Jumpei Sudo, Makoto Higaki, Nahoka Kawaguchi, Masaya Nitta, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane. 298-299 [doi]
• A High Common-Mode Transient Immunity GaN-on-SOI Gate Driver for High dV/dt SiC Power SwitchSi-Yi Li, Wei-Chien Hung, Tz-Wun Wang, Ya-Ting Hsu, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 302-303 [doi]
• 3-EMI Control GaN Switching Regulator With Modulation Frequency Envelope Tracking For Full-Spectrum Automotive CISPR 25 ComplianceLixiong Du, Dong Yan, Dongsheng Brian Ma. 304-305 [doi]
• A GaN Gate Driver with On-chip Adaptive On-time Controller and Negative Current Slope DetectorShu-Yung Lin, Ssu-Yu Lin, Sheng-Hsi Hung, Tz-Wun Wang, Ching-Ho Li, Chang-Lin Go, Shao-Chang Huang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 306-307 [doi]
• Multiple-Phase Accelerated Current Control in Bidirectional Energy Transfer of Automotive High-Voltage and Low-Voltage BatteriesTz-Wun Wang, Si-Yi Li, Sheng-Hsi Hung, Tzu-Ying Wu, Chi-yu Chen, Po-Jui Chiu, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Tsung-Yen Tsai, Shian-Ru Lin. 308-309 [doi]
• A 65nm CMOS Living-Cell Dynamic Fluorescence Sensor with 1.05fA Sensitivity at 600/700nm WavelengthsFatemeh Aghimand, Chelsea Hu, Saransh Sharma, Krishna K. Pochana, Richard M. Murray, Azita Emami. 312-313 [doi]
• A $\boldsymbol{22\mu \mathrm{W}}$ Peak Power Multimodal Electrochemical Sensor Interface IC for Bioreactor MonitoringQiuyang Lin, Wim Sijbers, Christina Avdikou, Didac Gomez Salinas, Dwaipayan Biswas, Sneha Sneha, Anastasios Malissovas, Bernardo Tacca, Nick Van Helleputte. 314-315 [doi]
• A CMOS Multi-Functional Biosensor Array for Rapid Low-Concentration Analyte Detection with On-Chip DEP-Assisted Active Enrichment and Manipulation with No External ElectrodesDongwon Lee, Doohwan Jung, Fuze Jiang, Gregory V. Junek, Jongseok Park, Hangxing Liu, Ying Kong, Youngin Kim, Jing Wang, Hua Wang 0006. 316-317 [doi]
• A 263GHz 32-Channel EPR-on-a-Chip Injection-Locked VCO-ArrayAnh Chu, Michal Kern, Khubaib Khan, Klaus Lips, Jens Anders. 318-319 [doi]
• An LTE-Harvesting BLE-to-WiFi Backscattering Chip for Single-Device RFID-Like InterrogationShihkai Kuo, Manideep Dunna, Hongyu Lu, Akshit Agarwal, Dinesh Bharadia, Patrick P. Mercier. 320-321 [doi]
• ASIL-D Compliant Battery Monitoring IC with High Measurement Accuracy and Robust CommunicationJong-Kyoung Lee, Sunsik Woo, Wooyoung Jeong, Kwang-Seok Oh, Donghyeon Kim, Youngwoon Ko, Jinyong Jeon, Jooho Lee, Young-Suk Son, Sang-Gug Lee, Kyeongha Kwon. 322-323 [doi]
• A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body BiasingFrancesco Conti 0001, Davide Rossi, Gianna Paulin, Anaelo Garofalo, Alfio Di Mauro, Georg Rutishauer, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini. 326-327 [doi]
• A 28nm 2D/3D Unified Sparse Convolution Accelerator with Block-Wise Neighbor Searcher for Large-Scaled Voxel-Based Point Cloud NetworkWenyu Sun, Xiaoyu Feng, Chen Tang, Shupei Fan, Yixiong Yang, Jinshan Yue, Huazhong Yang, Yongpan Liu. 328-329 [doi]
• A 127.8TOPS/W Arbitrarily Quantized 1-to-8b Scalable-Precision Accelerator for General-Purpose Deep Learning with Reduction of Storage, Logic and Latency WasteSeungHyun Moon, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim. 330-331 [doi]
• A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic DataflowCheng-Yan Du, Chieh-Fu Tsai, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang. 332-333 [doi]
• C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity GenerationSangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Hoi-Jun Yoo. 334-335 [doi]
• ANP-I: A 28nm 1.5pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-O.1 μJ/Sample On-Chip Learning for Edge-AI ApplicationsJilin Zhang, Dexuan Huo, Jian Zhang, Chunqi Qian, Qi Liu, Liyang Pan, Zhihua Wang, Ning Qiao, Kea-Tiong Tang, Hong Chen 0002. 336-337 [doi]
• DL-VOPU: An Energy-Efficient Domain-Specific Deep-Learning-Based Visual Object Processing Unit Supporting Multi-Scale Semantic Feature Extraction for Mobile Object Detection/Tracking ApplicationsYuchuan Gong, Teng Zhang, Hongtao Guo, Xiyuan Liu, Jingxiao Zheng, Hongqiang Wu, Conghan Jia, Luying Que, Liang Zhou, Liang Chang 0002, Jun Zhou 0017. 338-339 [doi]
• 2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOSSungjin Park, SunWoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Dongsuk Jeon. 340-341 [doi]
• A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power ManagementThierry Tambe, Jeff Zhang 0001, Coleman Hooper, Tianyu Jia, Paul N. Whatmough, Joseph Zuckerman, Maico Cassel dos Santos, Erik Jens Loscalzo, Davide Giri, Kenneth L. Shepard, Luca P. Carloni, Alexander M. Rush, David Brooks 0001, Gu-Yeon Wei. 342-343 [doi]
• A 7.9fJ/Conversion-Step and 37.12aFrms Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level ShiftingJihang Gao, Linxiao Shen, Heyi Li, Siyuan Ye, Jie Li, Xinhang Xu, Jiajia Cui, Yunhung Gao, Ru Huang, Le Ye. 346-347 [doi]
• A 40A Shunt-Based Current Sensor with ±0.2% Gain Error from -40°C to 125°C and Self-CalibrationZhong Tang, Nandor G. Toth, Roger Luis Brito Zamparette, Tomohiro Nezuka, Yoshikazu Furuta, Kofi A. A. Makinwa. 348-349 [doi]
• A 51A Hybrid Magnetic Current Sensor with a Dual Differential DC Servo Loop and 43mArms Resolution in a 5MHz BandwidthAmirhossein Jouvaeian, Qinwen Fan, Mario Motz, Udo Ausserlechner, Kofi A. A. Makinwa. 350-351 [doi]
• A Closed-Loop 12bit CMOS-Integrated Stress Sensor System with 4bit Adjustable Sensitivity from 178 to 11 kPa/LSB at up to 22.5kS/s and 5bit Dynamic Range AdjustmentKim Allinger, Matthias KuhI. 352-353 [doi]
• A Sub-1V 810nW Capacitively-Biased BJT-Based Temperature Sensor with an Inaccuracy of ±0.15°C (3σ) from -55°C to 125°CZhong Tang, Sining Pan, Kofi A. A. Makinwa. 354-355 [doi]
• A 2.98pJ/conversion 0.0023mm2 Dynamic Temperature Sensor with Fully On-Chip CorrectionsYuting Shen, Hanyue Li, Eugenio Cantatore, Pieter Harpe. 356-357 [doi]
• 2 Resolution FoM Using Continuous-Time ReadoutNandor G. Toth, Zhong Tang, Teruki Someya, Sining Pan, Kofi A. A. Makinwa. 358-359 [doi]
• A 0.64-to-0.69THz Beam-Steerable Coherent Source with 9.1dBm Radiated Power and 30.8dBm Lensless EIRP in 65nm CMOSLiang Gao, Chi Hou Chan. 362-363 [doi]
• A 264-to-287GHz, -2.5dBm Output Power, and -92dBc/Hz 1MHz-Phase-Noise CMOS Signal Source Adopting a 75fsrms Jitter D-Band Cascaded Sub-Sampling PLLByeong-Taek Moon, Sang-Gug Lee, Jaehyouk Choi. 364-365 [doi]
• A 200-to-350GHz SiGe BiCMOS Frequency Doubler with Slotline-Based Mode-Decoupling Harmonic-Tuning Technique Achieving 1.1-to-4.7dBm Output PowerShuyang Li, Xingcun Li, Huibo Wu, Wenhua Chen. 366-367 [doi]
• A 4.1 W Quadrature Doherty Digital Power Amplifier with 33.6% Peak PAE in 28nm Bulk CMOSJiaxiang Li, Yun Yin, Hang Chen, Jie Lin, Yicheng Li, Xianglong Jia, Zhen Hu, Xiuyin Zhang, Hongtao Xu. 370-371 [doi]
• A 19.7-to-43.8GHz Power Amplifier with Broadband Linearization Technique in 28nm Bulk CMOSWeisen Zeng, Li Gao, Ningzheng Sun, Hongtao Xu, Quan Xue, Xiuyin Zhang. 372-373 [doi]
• A 4.8dB NF, 70-to-86GHz Deep-Noise-Canceling LNA Using Asymmetric Compensation Transformer and 4-to-1 Hybrid-Phase Combiner in 40nm CMOSChangxuan Han, Jie Zhou, Zhixian Deng, Yiyang Shu, Xun Luo. 374-375 [doi]
• A 4b RFDAC at 8GS/s for FMCW Chirps with 4GHz Bandwidth in $\boldsymbol{10\mu} \mathbf{s}$Soumya Krishnapuram Sireesh, Sanaz Hadipour Abkenar, Niels Christotters, Christoph Wagner, Thorsten Brandt, Andreas Stelzer. 376-377 [doi]
• th-Order N-path Filter with Low-Power Clock Boosting for High Linearity and Relaxed $\mathrm{P}_{\text{dc}}$-Frequency Trade-OffAravind Nagulu, Mingyu Yi, Yi Zhuang, Sasank Garikapati, Harish Krishnaswamy. 378-379 [doi]
• A Source-Driver IC Including Power-Switching Fast-Slew-Rate Buffer and 8Gb/s Effective 3-Tap DFE Receiver Achieving 4.9mV DVRMS and 17V/ps Slew Rate for 8K Displays and BeyondKyungho Ryu, Ji-Yong Jeong, Jung-Pil Lim, Kil-Hoon Lee, Kyongho Kim, Yongil Kwon, Seongjong Yoo, Siwoo Kim, Hyun-Wook Lim, Jae-Youl Lee. 382-383 [doi]
• Virtual Rotating Gesture Recognizable Touch Readout IC for 1.26" Circular Touch Screen PanelSeunghoon Ko, Junmin Lee, Juwon Ham, Byungcheol So, Daeyeol Cho, Hyeongjoon Kim, Bokman Kim, Woogeun Sim, Gyutae Youm. 384-385 [doi]
• A 45.8dB-SNR 120fps 100pF-Load Self-Capacitance Touch-Screen Controller with Enhanced In-Band Common Noise Immunity Using Noise Antenna ReferenceSan-Ho Byun, Heejin Lee, Tae-Gyun Song, Jinchul Lee, Jongmin Baek, Gyeongmin Ha, Seunghoon Baek, Yeongmin Kim, Won-Gab Jung, Hyun-Wook Lim, Siwoo Kim, Jae-Youl Lee. 386-387 [doi]
• Some Recent Progress in BioelectronicsJohn Rogers. 390 [doi]
• The Tall Thin Molecular ProgrammerErik Winfree. 392-393 [doi]
• The Promise of 2-D Materials for Scaled Digital and Analog ApplicationsDevin Verreck, Piet Wambacq, Maarten Van De Put, Zubair Ahmed, Quentin Smets, Aryan Afzalian, Rutger Duflou, Xiangyu Wu, Gioele Mirabelli, Rongmei Chen, Inge Asselberghs, Gouri Sankar Kar. 394-395 [doi]
• Inverse Designed, Densely Integrated Classical and Quantum PhotonicsJelena Vuckovic, Geun Ho Ahn, Kasper Van Gasse, Melissa Guidry, Hyounghan Kwon, Jesse Lu, Daniil Lukin, Alexander Piggott, Neil V. Sapra, Logan Su, Jinhie Skarda, Rahul Trivedi, Dries Vercruysse, Alexander White, Joshua Yang, Ki Youl Yang. 396-397 [doi]
• A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit DensityAli Khakifirooz, Eduardo Anaya, Sriram Balasubrahrmanyam, Geoff Bennett, Daniel Castro, John Egler, Kuangchan Fan, Rifat Ferdous, Kartik Ganapathi, Omar Guzman, Chang-Wan Ha, Rezaul Haque, Vinaya Harish, Majid Jalalifar, Owen Jungroth, Sung-Taeg Kang, Golnaz Karbasian, Jee Yeon Kim, Siyue Li, Aliasgar S. Madraswala, Srivijay Maddukuri, Amr Mohammed, Shanmathi Mookiah, Shashi Nagabhushan, Binh Ngo, Deep Patel, Sai Kumar Poosarla, Naveen Prabhu V, Carlos Quiroga, Shantanu Rajwade, Ahsanur Rahman, Jalpa Shah, Rohit S. Shenoy, Ebenezer Tachie-Menson, Archana Tankasala, Sandeep Krishna Thirumala, Sagar Upadhyay, Krishnasree Upadhyayula, Ashley Velasco, Nanda Kishore Babu Vemula, Bhaskar Venkataramaiah, Jiantao Zhou, Bharat Pathak, Pranav Kalavade. 400-401 [doi]
• A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 Layers $\mathsf{i}$Bvunarvul Kim, Seungpil Lee, Beomseok Hah, Kanawoo Park, Yongsoon Park, Kangwook Jo, Yujong Noh, Hyeon-Cheon Seol, Hyunsoo Lee, Jae-Hyeon Shin, Seongjin Choi, Youngdon Jung, SungHo Ahn, Yonghun Park, Sujeong Oh, Myungsu Kim, Seonauk Kim, HyunWook Park, Taeho Lee, Haeun Won, MinSung Kim, Cheulhee Koo, Yeonjoo Choi, Suyoung Choi, Sechun Park, Dongkyu Youn, Junyoun Lim, Wonsun Park, Hwang Hur, KiChang Kwean, Hongsok Choi, Woopyo Jeong, Sungyong Chung, Jungdal Choi, Seonyong Cha. 402-403 [doi]
• A 4nm 16Gb/s/pin Single-Ended PAM4 Parallel Transceiver with Switching-Jitter Compensation and Transmitter OptimizationJahoon Jin, Soo-Min Lee, Kyunghwan Min, Sodam Ju, Jihoon Lim, Hyunsu Chae, Kwonwoo Kang, Yunji Hong, Yeongcheol Jeong, Sang-Ho Kim, Jongwoo Lee, Joonsuk Kim. 404-405 [doi]
• A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-DetectionKwanyeob Chae, Jiyeon Park, Jaegeun Song, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Taekyung Yeo, Kyeongkeun Kang, Sangsoo Park, Eunsu Kim, Sukhyun Jung, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin. 406-407 [doi]
• %-Duty-Cycle Quadrature-Clock Generator for Ultra-Low-Power Clock Distribution in High-Speed DRAM InterfacesYuhwan Shin, Yongwoo Jo, Juyeop Kim, Junseok Lee, Jongwha Kim, Jaehyouk Choi. 408-409 [doi]
• A 32Gb/s/pin 0.51 pJ/b Single-Ended Resistor-less Impedance-Matched Transmitter with a T-Coil-Based Edge-Boosting Equalizer in 40nm CMOSJung Hun Park, Hyeonseok Lee, Hoyeon Cho, SangHee Lee, Kwang-Hoon Lee, Han-Gon Ko, Deog Kyoon Jeong. 410-411 [doi]
• A 1.1V 6.4Gb/s/pin 24-Gb DDR5 SDRAM with a Highly-Accurate Duty Corrector and NBTI-Tolerant DLLDaehyun Kwon, Heon Su Jeong, Jaemin Choi, Wijong Kim, Jae-Woong Kim, Junsub Yoon, Jungmin Choi, Sanguk Lee, Hyunsub Norbert Rie, Jin-Il Lee, Jongbum Lee, Taeseong Jang, Junhyung Kim, Sanghee Kang, Jung-Bum Shin, Yanggyoon Loh, Chang-Yong Lee, Junmyung Woo, Hye-Seung Yu, Changhyun Bae, Reum Oh, Young-Soo Sohn, Changsik Yoo, Jooyoung Lee. 412-413 [doi]
• A 1.1V 16Gb DDR5 DRAM with Probabilistic-Aggressor Tracking, Refresh-Management Functionality, Per-Row Hammer Tracking, a Multi-Step Precharge, and Core-Bias Modulation for Security and Reliability EnhancementWoongrae Kim, Chulmoon Jung, Seong Nyuh Yoo, Duckhwa Hong, Jeongjin Hwang, Jungmin Yoon, Oh-Yong Jung, Joonwoo Choi, Sanga Hyun, Mankeun Kang, Sangho Lee, Dohong Kim, Sanghyun Ku, Donhyun Choi, Nogeun Joo, Sangwoo Yoon, Junseok Noh, Byeongyong Go, Cheolhoe Kim, Sunil Hwang, Mihyun Hwang, Seol-Min Yi, Hyungmin Kim, Sanghyuk Heo, Yeonsu Jang, Kyoungchul Jang, Shinho Chu, Yoonna Oh, Kwidong Kim, Junghyun Kim, Soohwan Kim, Jeongtae Hwang, Sangil Park, Junphyo Lee, In-Chul Jeong, Joohwan Cho, Jonghwan Kim. 414-415 [doi]
• A 32.5mW Mixed-Signal Processing-in-Memory-Based k-SAT Solver in 65nm CMOS with 74.0% Solvability for 3D-Variable 126-Clause 3-SAT ProblemsDaehyun Kim, Nael Mizanur Rahman, Saibal Mukhopadhyay. 418-419 [doi]
• Snap-SAT: A One-Shot Energy-Performance-Aware All-Digital Compute-in-Memory Solver for Large-Scale Hard Boolean Satisfiability ProblemsShanshan Xie, Mengtian Yang, S. Andrew Lanham, Yipeng Wang, Meizhi Wang, Sirish Oruganti, Jaydeep P. Kulkarni. 420-421 [doi]
• An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder TreesHyochan An, Yu Chen, Zichen Fan, Qirui Zhang 0001, Pierre Abillama, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester. 422-423 [doi]
• Wafer-Level Stacking of High-Density Capacitors to Enhance the Performance of a Large Multicore Processor for Machine Learning ApplicationsStephen Felix, Shannon Morton, Simon Stacey, John Walsh. 424-425 [doi]
• A 73.53TOPS/W 14.74TOPS Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Hybrid Frame and Event-Based Target TrackingMuya Chang, Ashwin Sanjay Lele, Samuel D. Spetalnick, Brian Crafton, Shota Konno, Zishen Wan, Ashwin Bhat, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury. 426-427 [doi]
• A $1.5\mu\mathrm{W}$ End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog FrontendJi-Hwan SeoI, Heejin Yang, Rohit Rothe, Zichen Fan, Qirui Zhang 0001, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester. 428-429 [doi]
• CCSA: A 394TOPS/W Mixed-Signal GPS Accelerator with Charge-Based Correlation Computing for Signal AcquisitionJieyu Li, Weifeng He, Bo Zhang, Liang Qi, Guanghui He, Mingoo Seok. 430-431 [doi]
• 2 Universal Soft-Detection Decoder Using ORBGRAND in 40nm CMOSArslan Riaz, Alperen Yasar, Furkan Ercan, Wei An, Jonathan Ngo, Kevin Galligan, Muriel Médard, Ken R. Duffy, Rabia Tugce Yazicigl. 432-433 [doi]
• An 8T eNVSRAM Macro in 22nm FDSOI Standard Logic with Simultaneous Full-Array Data Restore for Secure IoT DevicesSepideh Nouri, Subramanian S. Iyer. 434-435 [doi]
• 30.1 A Scalable N-Step Equal Split SSHI Piezoelectric Energy Harvesting Circuit Achieving 1170% Power Extraction Improvement and 22nA Quiescent Current with a $\mathbf{1\mu{H}-{to}-10\mu H}$ Low Q InductorYeon-Woo Jeong, Seung-Ju Lee, Jong-Hun Kim, Mun-Jung Cho, Hwa Soo Kim, Se-un Shin. 438-439 [doi]
• A 93.2%-Efficiency Multi-Input Bipolar Energy Harvester with $17.9\times$ MPPT Loss ReductionZhen-Yu Yang, An Chen, Cheng-Wen Chen, Wei-Chieh Hung, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 440-441 [doi]
• A Bias-Flip Rectifier with a Duty-Cycle-Based MPPT Algorithm for Piezoelectric Energy Harvesting with 98% Peak MPPT Efficiency and 738% Energy-Extraction EnhancementXinling Yue, Sundeep Javvaji, Zhong Tang, Kofi A. A. Makinwa, Sijun Du. 442-443 [doi]
• A 3. 7V-to-1kV Chip-Cascaded Switched-Capacitor Converter with Auxiliary Boost Achieving > 96{\%}$ Reactive Power Efficiency for Electrostatic Drive ApplicationsYanqiao Li, Bahlakoana Mabetha, Jason T. Stauth. 444-445 [doi]
• A 95.3% 5V-to-32V Wide Range 3-Level Current Mode Boost Converter with Fully State-based Phase Selection Achieving Simultaneous High-Speed $\mathbf{V}_{\text{CF}}$ Balancing and Smooth TransitionSeung-Ju Lee, Yean-Woo Jeong, Mun-Jung Cho, Jong-Hun Kim, Hwa Soo Kim, Jun-Suk Bang, Se-un Shin. 446-447 [doi]
• %-Peak-Efficiency 1.47A/mm2-Current-Density Buck-Boost Converter with Always Reduced Conduction LossJi Jin, Yufa Zhou, Changjin Chen, Xu Han, Weiwei Xu, Lin Cheng. 448-449 [doi]
• A Continuously Scalable-Conversion-Ratio SC Converter with Reconfigurable VCF Step for High Efficiency over an Extended VCR RangeYuanfei Wang, Mo Huang, Yan Lu 0002, Rui Paulo Martins. 450-451 [doi]
• 3D Wireless Power Transfer with Noise Cancellation Technique for -62dB Noise Suppression and 90.1% EfficiencyFei Huang, Hsing-Yen Tsai, Chi-Yu Huang, Yu-Chun Luo, Ching-Ho Li, Shao-Chang Huang, Yi-Hsiang Kao, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 452-453 [doi]
• A 90%-Efficiency 40.68MHz Single-Stage Dual-Output Regulating Rectifier with ZVS and Synchronous PFM Control for Wireless PoweringZiyang Luo, Jin Liu, Hoi Lee. 454-455 [doi]
• Single-Chip Qi-Compliant 40W Wireless-Power-Transmission Controller using RMS Coil Current Sensing and Adaptive ZVS for 4dB EMI and up to 1.7% Efficiency ImprovementsFilippo Neri, Gus Mehas, Fabio Di Fazio, Giovanni Figliozzi, Jure Menart, Marcin K. Augustyniak, Turev Acar, Amit Bavisi. 456-457 [doi]
• A Quadrature Uncertain-IF IR-UWB Transceiver with Twin-OOK ModulationBowen Wang, Woogeun Rhee, Zhihua Wang 0001. 460-461 [doi]
• A Fully Integrated IEEE 802.15.4/4z-Compliant 6.5-to-8GHz UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28nm ProcessWan Kim, Hyun-Gi Seok, Geunhaeng Lee, Sinyoung Kim, Jae-Keun Lee, Chanho Kim, Wonkang Kim, Wonjun Jung, Youngsea Cho, Seungyong Bae, Jongpil Cho, Hyeokju Na, Byoungjoong Kang, Honggul Han, HyeonUk Son, Chiyoung Ahn, Hoon Kang, Sukjin Jung, Hyukjun Sung, Yeongdae Kim, Donghan Kim, Dongsu Kim, Ji-Seon Paek, Seunghyun Oh, Jongwoo Lee, Sungung Kwak, Joonsuk Kim. 462-463 [doi]
• A 1.8Gb/s, 2.3pJ/bit, Crystal-Less IR-UWB Transmitter for Neural ImplantsJiaxin Lei, Xiliang Liu, Wei Song, Heng Huang, Xiaoyan Ma, Junliang Wei, Milin Zhang. 464-465 [doi]
• A 128-Channel 2mmx2mm Battery-Free Neural Dielet Merging Simultaneous Multi-Channel Transmission Through Multi-Carrier Orthogonal BackscatterChanggui Yang, Zhihuan Zhang, Lei Zhang, Yunshan Zhang, Zhuhao Li, Yuxuan Luo, Gang Pan 0001, Bo Zhao 0003. 466-467 [doi]
• A Passive Bidirectional BLETag Demonstrating Battery-Free Communication in Tablet/Smartphone-to-Tag, Tag-to-Tablet/Smartphone, and Tag-to-Tag ModesZiyi Chang, Qijing Xiao, Weixiao Wang, Yuxuan Luo, Bo Zhao 0003. 468-469 [doi]
• A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX PowerZhizhan Yang, Jun Yin 0001, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins. 470-471 [doi]
• A 0.7-to-2.5GHz Sliding Digital-IF Quadrature Digital Transmitter Achieving >40% System Efficiency for Multi-Mode NB-IoT/BLE ApplicationsChunxiao Hu, Diyang Zheng, Yun Yin, Jie Lin, Yicheng Li, Wei Li, Hongtao Xu. 472-473 [doi]
• A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving -85dBm/100kb/s Sensitivity, -41dB SIR and 174dB RX FoM in 22nm CMOSHayden Bialek, Matthew L. Johnston, Arun Natarajan 0001. 474-475 [doi]
• A Behind-The-Ear Patch-Type Mental Healthcare Integrated Interface with 275-Fold Input Impedance Boosting and Adaptive Multimodal Compensation CapabilitiesHyunjoong Kim, Myeongwoo Kim, Kwangmuk Lee, Sanghyeon Cho, Chan Sam Park, Solwoong Song, Dae Sik Keum, Dong Pyo Jang, Jae-Joon Kim. 478-479 [doi]
• A Stimulus-Scattering-Free Pixel-Sharing Sub-Retinal Prosthesis SoC with 35.8dB Dynamic Range Time-Based Photodiode Sensing and Per-Pixel Dynamic Voltage ScalingKyeongho Eom, Minju Park, Han-Sol Lee, Seung-Beom Ku, Namju Kim, Seongkwann Cha, Yong-Sook Goo, Sohee Kim, Seong-Woo Kim, Hyung-Min Lee. 480-481 [doi]
• A 1V 136.6dB-DR 4kHz-BW $\Delta\Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18\mu\mathrm{m}$ CMOSTaeryoung Seol, Sehwan Lee, Geunha Kim, Samhwan Kim, Euiseong Kim, Seungyeob Baik, Jaeha Kung, Ji-Woong Choi, Arup K. George, Junghyup Lee. 482-483 [doi]
• nd-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOSGeunha Kim, Sehwan Lee, Taeryoung Seol, Seungyeob Baik, Yeonjae Shin, Gain Kim, Jong-Hyeok Yoon, Arup K. George, Junghyup Lee. 484-485 [doi]
• 2/Ch and $1.78\mu \text{W/ch}$Yingping Chen, Bernardo Tacca, Yunzhu Chen, Dwaipayan Biswas, Georges G. E. Gielen, Francky Catthoor, Marian Verhelst, Carolina Mora Lopez. 486-487 [doi]
• SciCNN: A 0-Shot-Retraining Patient-Independent Epilepsy-Tracking SoCChne Wuen Tsai, Rucheng Jiang, Lian Zhang, Miaolin Zhang, Liuhao Wu, Jiaqi Guo, Zhongwei Yan, Jerald Yoo. 488-489 [doi]
• Fascicle-Selective Bidirectional Peripheral Nerve Interface IC with 173dB FOM Noise-Shaping SAR ADCs and 1.38pJ/b Frequency-Multiplying Current-Ripple Radio TransmitterJianxiong Xu, José B. Sales Filho, Sudip Nag, Liam Long, Camilo Tejeiro, Eugene Hwang, Gerard O'Leary, Yu Huang, Mustafa A. Kanchwala, Mohammad Abdolrazzaghi, Chenxi Tang, Patty Liu, Yuan Sui, Xilin Liu, George V. Eleftheriades, José Zariffa, Roman Genov. 490-491 [doi]
• A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic ImmunityPo-Hao Lee, Chia-Fu Lee, Yi-Chun Shih, Hon-Jarn Lin, Yen-An Chang, Cheng-Han Lu, Yu-Lin Chen, Chieh-Pu Lo, Chung-Chieh Chen, Cheng-Hsiung Kuo, Tan-Li Chou, Chia-Yu Wang, J.-J. Wu, Roger Wang, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang. 494-495 [doi]
• A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI DevicesYen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Guan-Yi Lin, Po-Jung Chen, Tsen-Hsiang Pan, De-Qi You, Fang-yi Chen, Andrew Lee, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang. 496-497 [doi]
• 12-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense AmplifierJianguo Yang, Qing Luo, Xiaoyong Xue, Haijun Jiang, Qiqiao Wu, Zhongze Han, Yue Cao, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu 0010, Ming Liu 0022. 498-499 [doi]
• A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI InferenceHao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-Le Cui, Yanan Guo, Xiaoyun Tian, Bo Liu 0019, Xin Si, Zhen Wang, Jun Yang 0006, Weiwei Shan. 500-501 [doi]
• THz Cryo-CMOS Backscatter Transceiver: A Contactless 4 Kelvin-300 Kelvin Data InterfaceJinchen Wang, Mohamed I. Ibrahim, Isaac B. Harris, Nathan M. Monroe, Muhammad Ibrahim Wasiq Khan, Xiang Yi, Dirk R. Englund, Ruonan Han 0001. 504-505 [doi]
• A 28-nm Bulk-CMOS IC for Full Control of a Superconducting Quantum Processor Unit-CellJuhwan Yoo, Zijun Chen, Frank Arute, Shirin Montazeri, Marco Szalay, Catherine Erickson, Evan Jeffrey, Reza Fatemi, Marissa Giustina, Markus Ansmann, Erik Lucero, Julian Kelly, Joseph C. Bardin. 506-507 [doi]
• A Polar-Modulation-Based Cryogenic Qubit State Controller in 28nm Bulk CMOSYanshu Guo, Yaoyu Li, Wenqiang Huang, Songyao Tan, Qichun Liu, Tiefu Li, Ning Deng, Zhihua Wang 0001, Yuanjin Zheng, Hanjun Jiang. 508-509 [doi]
• A Cryogenic Controller IC for Superconducting Qubits with DRAG Pulse Generation by Direct Synthesis without Using MemoryKiseo Kang, Donggyu Minn, Jaeho Lee, Ho-Jin Song, Moonjoo Lee, Jae-Yoon Sim. 510-511 [doi]
• A Calibration-Free 12.8-16.5GHz Cryogenic CMOS VCO with 202dBc/Hz FoM for Classic-Quantum InterfaceGengnanyang Zhang, Haichuan Lin, Cheng Wang. 512-513 [doi]