Hongzhuo Liu - researchr alias

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Viewing Publication 1 - 6 from 6

2023

A 4.8-GHz Time-Interleaved Multi-Reference PLL with 16.1-fs JitterHongzhuo Liu, Wei Deng 0001, Haikun Jia, Shiwei Zhang, Shiyan Sun, Baoyong Chi. esscirc 2023: 261-264 [doi]

IEEE ASSCC 2023/ Session 10/ Paper 10.5Ruichang Ma, Haikun Jia, Hongzhuo Liu, Wei Deng 0001, Zhihua Wang 0001, Baoyong Chi. asscc 2023: 1-3 [doi]

An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation TechniqueQixiu Wu, Wei Deng 0001, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang 0001, Baoyong Chi. isscc 2023: 146-147 [doi]

An 11.4-to-16.4GHz FMCW Digital PLL with Cycle-slipping Compensation and Back-tracking DPD Achieving 0.034% RMS Frequency Error under 3.4-GHz Chirp Bandwidth and 960-MHz/μs Chirp SlopeAngxiao Yan, Wei Deng 0001, Haikun Jia, Shiyan Sun, Chao Tang, Bufan Zhu, Yu Fu, Hongzhuo Liu, Baoyong Chi. vlsit 2023: 1-2 [doi]

A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms Jitter and -83.9 dBc Reference Spur Level using a -130.8 dBc/Hz Phase Noise at 1MHz offset Folded Series-Resonance VCO in 65nm CMOSShiwei Zhang, Wei Deng 0001, Haikun Jia, Hongzhuo Liu, Shiyan Sun, Pingda Guan, Baoyong Chi. cicc 2023: 1-2 [doi]

2022

divHongzhuo Liu, Wei Deng 0001, Haikun Jia, Shiyan Sun, Qixiu Wu, Jiajie Tang, Zhihua Wang 0001, Baoyong Chi. esscirc 2022: 233-236 [doi]

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