Table of Contents

• A 3.5MHz-BW 128nTrms Resolution TMR Readout Using Ping-Pong Auto-Zeroing and SAR-Assisted Offset Calibration for Contactless Current SensingTian Dong, Tianxiang Qu, Wenhui Qin, Yaohua Pan, Yun Sheng, Zhiliang Hong, Jiawei Xu 0001. 1-4 [doi]
• A 11GΩ-Input-Impedance 700mVpp-Input-Signal- Range 87dB-SNDR Direct-Digitization AFE for Wearable EEG RecordingYuying Li, Yijie Li, Hao Li, Zhiliang Hong, Jiawei Xu 0001. 1-4 [doi]
• A 7-Channel Bio-Signal Analog Front End Employing Single-End Chopping Amplifier Achieving 1.48 NEFRenze Gan, Liangjian Lyu, C.-J. Richard Shi. 5-8 [doi]
• A 2.2 fA/√Hz, 120 dB Dynamic Range, 12 GΩ Hybrid Readout Interface for Various Ionic Spectroscopy ApplicationsIslam Mostafa, Eva-Maria Korek, Ralf Brederlow. 9-12 [doi]
• A 13 × W, 94 mK Resolution, CMOS PD ΔΣ M Temperature-to-Digital Converter With Power-Gating TechniqueYing-Jie Huang, Yu-Chiao Huang, Yu-Hao Chiu, Wen-Pin Tsai, Yu-Te Liao. 17-20 [doi]
• A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-upPeter Deaville, Bonan Zhang, Naveen Verma. 21-24 [doi]
• Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error CompensationSaion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag. 25-28 [doi]
• A FeFET In-Memory-Computing Core with Offset Cancellation for Mitigating Computational ErrorsLei Zhang 0172, Pengcheng Xu, David Borggreve, Frank Vanselow, Ralf Brederlow. 29-32 [doi]
• AFE-CIM: A Current-Domain Compute-In-Memory Macro for Analog-to-Feature ExtractionSudarshan Sharma, Wei-chun Wang, Coleman DeLude, Minah Lee, Nael Mizanur Rahman, Narasimha Vasishta Kidambi, Justin Romberg, Saibal Mukhopadhyay. 33-36 [doi]
• Compute-MLROM: Compute-in-Multi Level Read Only Memory for Energy Efficient Edge AI Inference EnginesRishabh Sehgal, Rishab Mehra, Can Ni, Jaydeep P. Kulkarni. 37-40 [doi]
• A 50μW 2.45GHz Direct-Conversion RX with On-Chip LO with -84dBm Sensitivity for 1Mb/s GFSKMaryam Dodangeh, Mark S. Oude Alink, Jan Prummel, Bram Nauta. 41-44 [doi]
• A 380μW IEEE 802.15.4z IR-UWB pulse-mixing transmitter featuring enable-locking RFDCO with extensive duty-cycling in 22nm FDSOIElbert Bechthum, Erwin Allebes, Paul Mateman, Yiyu Shen, Peter Vis, Yao-Hong Liu, Christian Bachmann. 45-48 [doi]
• Single-Antenna Backscattered BLE5 Transmitter with up to 97m Range, 10.6 μW Peak Power for Purely-Harvested Green SystemsKarim Ali Ahmed, Ruiyuan Yang, Praveenakumar Shivappa Salamani, Viveka Konandur Rajanna, Massimo Alioto. 49-52 [doi]
• A 17.3mW IEEE 802.15.4/4z Coherent Quadrature Hybrid Correlation UWB Receiver in 65nm CMOSYunzhao Nie, Woogeun Rhee, Zhihua Wang 0001. 53-56 [doi]
• An Interferer-Tolerant RX with Translational Positive Feedback for 5G NR Applications Achieving 3.4 dB NF and 18 dBm OOB IIP3Simone Lecchi, Danilo Manstretta, Rinaldo Castello. 57-60 [doi]
• A worldwide-compliant 802.15.4/4z IR-UWB RFDAC transmitter in 28nm CMOS with 12dBm peak output powerErik Olieman, Helmut Kranabenter, Mark Stoopman, Alberto Dei, Christophe Pinatel, Jan van Sinderen. 61-64 [doi]
• A 20mW 130-175GHz Phase Shifter with Meandered λ/2 TLINEs in BiCMOS 55nmLorenzo Piotto, Guglielmo De Filippi, Andrea Bilato, Andrea Mazzanti. 65-68 [doi]
• A Dual-Mode Bi-Directional CMOS Mixer Using Push-Push Doubler for 300GHz-Band TransceiversChenxin Liu, Ibrahim Abdo, Chun Wang, Hiroyuki Sakai 0009, Atsushi Shirane, Kenichi Okada. 69-72 [doi]
• A 137-GHz Ultra-Wide Bandwidth High-Linearity CMOS Distributed Amplifier for High-Speed CommunicationDongwon Lee, Jeongsoo Park 0006, Kyung-Sik Choi, Yuqi Liu, Hua Wang 0006. 73-76 [doi]
• An Automated Approach to Power Amplifier Design Demonstrated with a SiGe Process at 140 GHzEverett O'Malley, James F. Buckwalter. 77-80 [doi]
• A 4nm FinFET 0.8V 13ppm/°C Switched Capacitor Based Current Mode Bandgap ReferenceHuanhuan Zhang, Alexander Lyakhov, Arvind Raghavan. 81-84 [doi]
• 2 8nW Resistor-Less BJT Bandgap Reference in 65nmAsaf Feldman, Joseph Shor. 85-88 [doi]
• A 4.6nW Subthreshold Voltage Reference with 400× Current Variation Reduction and 64-Step 0.11% Output Voltage ProgrammabilityYimai Peng, Ashwin Bhat, Sanjay Wadhwa, David T. Blaauw, Dennis Sylvester. 89-92 [doi]
• A 1.9μVrms 7.7ppm/°C ADC Reference with 20mA Output Current and Single-Trim Inaccuracy of ±0.03%(3σ) from -40°C to 125°CHongyu Tian, Tianxiang Qu, Ting Yi, Zhiliang Hong, Jiawei Xu 0001. 93-96 [doi]
• A 500 × 500 Pixel Image Sensor with Arbitrary Number of RoIs per Frame and Image Filtering for Center of Mass EstimationMassimo Gottardi, Luca Parmesan, Pietro Tosato, Evgeny Demenev, Enrico Manuzzato, Leonardo Gasparini. 97-100 [doi]
• A 64×64 SPAD-based 3D Image Sensor with Adaptive Pixel Sensitivity and Asynchronous ReadoutRubén Gómez-Merchán, Juan A. Leñero-Bardallo, Rafael de la Rosa-Vidal, Ángel Rodríguez-Vázquez. 101-104 [doi]
• A 100x100 CMOS SPAD Array with In-Pixel Correlation Techniques for Fast Quantum Ghost Imaging ApplicationsMassimo Gandola, Enrico Manuzzato, Matteo Perenzoni, Filippo Dal Farra, Valerio Flavio Gili, Dupish Dupish, Andres Vega, Thomas Pertsch, Frank Setzpfandt, Leonardo Gasparini. 105-108 [doi]
• A Time-Memory-based CMOS Vision Sensor with In-Pixel Temporal Derivative Computing for Multi-Mode Image ProcessingDong-Woo Jee, Seong-Min Ko, Kishore Kasichainula, Injune Yeo, Yu Cao 0001, Jae-sun Seo. 109-112 [doi]
• A 690fJ/Bit ML-Attack-Resilient Strong PUF Based on Subthreshold Voltage Attenuator Ring with Closed-Loop FeedbackHaotao Lin, Haibiao Zuo, Qiaozhou Peng, Xiaojin Zhao. 113-116 [doi]
• A 65nm RRAM Compute-in-Memory Macro for Genome Sequencing AlignmentFan Zhang 0069, Wangxin He, Injune Yeo, Maximilian Liehr, Nathaniel Cady, Yu Cao 0001, Jae-sun Seo, Deliang Fan. 117-120 [doi]
• A 12.5-ppm/°C 1.086-nW/kHz Relaxation Oscillator with Clock-Gated Discrete-Time Comparator in 22nm CMOS TechnologyXinhang Xu, Linxiao Shen, Siyuan Ye, Jiayi Wu, Zhuoyi Chen, Jihang Gao, Jiajia Cui, Yihan Zhang 0002, Ru Huang, Le Ye. 121-124 [doi]
• A 13-16 GHz Low-Noise Oscillator with Enhanced Tank Energy in 22-nm FDSOISriram Balamurali, Giovanni Mangraviti, Zhiwei Zhong, Piet Wambacq, Jan Craninckx. 125-128 [doi]
• rd-Harmonic Tuning in 65nm CMOSShuo Tian, Xiaolong Liu. 129-132 [doi]
• A Compact 240 GHz Differential Fundamental Oscillator with -94.2dBc/Hz Phase Noise and 5.4% DC-to-RF Efficiency in 22nm FDSOIYue Liang, Qin Chen, Xuexue Zhang, Xu Wu, Xiangning Fan, Lianming Li. 133-136 [doi]
• A 0.4V 12b Comparator Offset Injection Assisted SAR ADC achieving 0.425 fJ/conv-stepJapesh Vohra, Karim Ali Ahmed, Massimo Alioto. 137-140 [doi]
• A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOIJonathan Ungethüm, Michael Pietzko, Ahmed Abdelaal, John G. Kauffman, Maurits Ortmanns. 141-144 [doi]
• A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew CalibrationMingyang Gu, Yunsong Tao, Xiyu He, Yi Zhong, Lu Jie, Nan Sun 0001. 145-148 [doi]
• On the Noise Contribution of Dielectric Interfaces in Biochemical CMOS Sensor ChipsMathias Schulz, Stefan Keil, Simon Löhlein, Sourish Banerjee, Nicolai Simon, Catherine Dubourdieu, Volker Bucher, Roland Thewes. 149-152 [doi]
• Ultra-High Sensitivity Silicon Nanowire Array Biosensor Based on a Constant-Current Method for Continuous Real-Time pH and Protein Monitoring in Interstitial FluidY. Sprunger, L. Capua, T. Ernst, S. Barraud, A. M. Ionescu, A. Saeidi. 153-156 [doi]
• A Cryogenic Active Router for Qubit Array Biasing from DC to 320 MHz at 100 nm Gate PitchBaptiste Jadot, Marcos Zurita, Gérard Billiot, Yvain Thonnart, Lock Le Guevel, Mathieu Darnas, Candice Thomas, Jean Charbonnier, Tristan Meunier, Maud Vinet, Franck Badets, Gaël Pillonnet. 157-160 [doi]
• SiGe Qubit Biasing with a Cryogenic CMOS DAC at mK TemperatureLea Schreckenberg, René Otten, Patrick Vliex, Ran Xue, Jhih-Sian Tu, Inga Seidler, Stefan Trellenkamp, Lars R. Schreiber, Hendrik Bluhm, Stefan van Waasen. 161-164 [doi]
• A Benchmark of Cryo-CMOS 40-nm Embedded SRAM/DRAMs for Quantum ComputingRob A. Damsteegt, Ramon W. J. Overwater, Masoud Babaie, Fabio Sebastiano. 165-168 [doi]
• A 7-10b Programmable Cryo-CMOS TI-SAR ADC for Multichannel Qubit Readout with On-Chip Background Inter-Channel Mismatch CalibrationsJaeho Lee, Kiseo Kang, Donggyu Minn, Jae-Yoon Sim. 169-172 [doi]
• A 0.49-9.8 Gb/s 0.1-1V Output Swing Transmitter with 38.4MHz Reference and <30 ns Turn-On TimeJaya Deepthi Bandarupalli, Saurabh Saxena. 173-176 [doi]
• 2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFEZhaoyu Zhang, Zhao Zhang 0004, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu. 177-180 [doi]
• An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nmHanho Choi, Ha-Il Song, Hyosup Won, Jun Young Yoo, Woohyun Kwon, Huxian Jin, Konan Kwon, Cheong Min Lee, Gain Kim, Jake Eu, Sean Park, Hyeon-Min Bae. 181-184 [doi]
• A Multi-Overloading-Factor Sparse Code Multiple Access Decoder for 5G CommunicationsZhi-Jing Lin, Ti-Yu Chen, Tzi-Dar Chiueh. 185-188 [doi]
• A 22-nm 1,287-MOPS/W Structured Data-Path Array for Binary Ring-LWE PQCShutao Zhang, Tobias Gemmeke. 189-192 [doi]
• A 10.33 μJ/encryption Homomorphic Encryption Engine in 28nm CMOS with 4096-degree 109-bit Polynomials for Resource-Constrained IoT ClientsSiddharth Das, McKenzie van der Hagen, Swarali Patil, Cagri Erbagci, Brandon Lucia, Ken Mai. 193-196 [doi]
• A Sub-ns Pulsed VCSEL Driver with Real-Time Adaptive Current Control, Integrated Boost Switching Regulator and Class-1 Laser Eye SafetyTao Xia, Yuan Li, Liujia Song, Wei Chen, Hengwei Yu, Miao Sun, Lei Zhao, Zhihong Lin, Yuntong Tian, Hao Yan, Jiabin Meng, Yifan Wu, Yajie Qin, XueFeng Chen, Shenglong Zhuo, Patrick Yin Chiang. 197-200 [doi]
• A Fully Integrated Adaptive Dead-Time Controlling Gate Driver Enabling ZVS in HV ConvertersLéon Weihs, Erik Wehr, Kenny Vohl, Tobias Zekorn, Ralf Wunderlich, Stefan Heinen. 201-204 [doi]
• A 10 GHz Quadruple-Tail Comparator with Double Feedforward Paths and Minimal Delay Slope in 28 nm CMOSZongyuan Li, Filip Tavernier. 205-208 [doi]
• A 125dBSPL 1%-THD, 115μA MEMS Microphone Using Passive Pre-Distortion TechniqueMiodrag Nikolic, Wilfried Florian, Richard Gaggl, Lei Liao. 209-212 [doi]
• Analog Kalman Filter with Integration and Digitization via a Shared Thyristor-Based VCO for Sensor Fusion in 65 nm CMOSMayank Palaria, Shiyu Su, Hsiang-Chun Cheng, Rezwan A. Rasul, Qiaochu Zhang, Soumya Mahapatra, Chong-Fatt Law, Sushmit Hossain, Ryan M. Bena, Wei Wu, Quan Nguyen 0004, Mike Shuo-Wei Chen. 213-216 [doi]
• Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOSMoritz Scherer, Manuel Eggimann, Alfio Di Mauro, Arpan Suravi Prasad, Francesco Conti 0001, Davide Rossi, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini. 217-220 [doi]
• A 4.27TFLOPS/W FP4/FP8 Hybrid-Precision Neural Network Training Processor Using Shift-Add MAC and Reconfigurable PE ArraySunWoo Lee, Jeongwoo Park, Dongsuk Jeon. 221-224 [doi]
• BIOS: A 40nm Bionic Sensor-defined 0.47pJ/SOP, 268.7TSOPs/W Configurable Spiking Neuron-in-Memory Processor for Wearable HealthcareFengshi Tian, Xiaomeng Wang, Jinbo Chen, Jiakun Zheng, Hui Wu, Xuejiao Liu, Fengbin Tu, Jie Yang 0033, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng. 225-228 [doi]
• HDBinaryCore: A 28nm 2048-bit Hyper-Dimensional biosignal classifier achieving 25 nJ/prediction for EMG hand-gesture recognitionSohum Datta, Brian C. Richards, Harrison Liew, Youbin Kim, Daniel Sun 0005, Jan M. Rabaey. 229-232 [doi]
• An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-AttacksSaurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan. 233-236 [doi]
• Adaptive Output Discharge DC-DC for glare free LED front-lightPaolo Lorenzi, Fausto Borghetti, Roberto Penzo, Edoardo Bezzati, Enrico Tonazzo, Maurizio Galvano. 237-240 [doi]
• Integrated Metal Shunt with Matched Sensing Resistor for High-Side Current SensingRoberto Pio Baorda, Tommaso Rosa, Paolo Angelini, Giorgio Bosisio, Alberto Cattani. 241-244 [doi]
• A Negative-Gm Oscillator With Common Mode Transient Immunity Enhancements For Galvanically Isolated Gate DriversInes Hurez, Vlad Anghel, Gheorghe Brezeanu. 245-248 [doi]
• A 2 A Maximum Load Current Capable 0-to-1 μF Off-chip Capacitor N-type LDO using Dual Dynamic Negative Feedback Loop and an Improved Error AmplifierHo-Chan Ahn, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Chan Kyu Lee, Sung-Wan Hong. 249-252 [doi]
• A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading RangeWen-Yang Hsu, Joan Aymerich, Xiaolin Yang, Chutham Sawigun, Philippe Coppejans, Carolina Mora Lopez. 253-256 [doi]
• A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoMXinyu Shen, Zhao Zhang 0004, Guike Li, Yong Chen, Nan Qi, Jian Liu 0021, Nanjian Wu, Liyuan Liu. 257-260 [doi]
• A 4.8-GHz Time-Interleaved Multi-Reference PLL with 16.1-fs JitterHongzhuo Liu, Wei Deng 0001, Haikun Jia, Shiwei Zhang, Shiyan Sun, Baoyong Chi. 261-264 [doi]
• A Fully Synthesizable DPLL with Background Gain Mismatch Calibrated Feedforward Phase Noise Cancellation PathWaleed Madany, Yuncheng Zhang, Ashbir Aviat Fadila, Hongye Huang, Junjun Qiu, Atsushi Shirane, Kenichi Okada. 265-268 [doi]
• 0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOIAndres Asprilla, Andreia Cathelin, Yann Deval. 269-272 [doi]
• A Near-Threshold Ring-Oscillator-Based ILCM with Edge-Selective Error Detector Achieving -64 dBc Reference-Spur and -239 dB FoMJiwon Shin, Joonghyun Song, Jihee Kim, Woo-seok Choi. 273-276 [doi]
• Software Abstraction of Next Generation Radio Access NetworksBrendan Farley. 277-280 [doi]
• A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing LogicRucheng Jiang, Han Wu 0003, Kian Ann Ng, Chne Wuen Tsai, Jerald Yoo. 281-284 [doi]
• A 13.2fJ/step 74.3-dB SNDR Pipelined Noise-shaping SAR+VCO ADCSumukh Prashant Bhanushali, Arindam Sanyal. 285-288 [doi]
• A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal AcquisitionMengyu Li, Shuang Song 0003, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan. 289-292 [doi]
• nd-order RT-DEM and Quiet ChoppingChaoyang Xing, Yi Zhong, Nan Sun 0001, Lu Jie. 293-296 [doi]
• A 256-Channel In-Pixel Electrochemical Platform in CMOS for Rapid Isothermal Genetic Amplification and ScreeningHangxing Liu, Fuze Jiang, Dongwon Lee, Yuguo Sheng, Adam Y. Wang, Marco Saif, Ying Kong, Zhikai Huang, Thomas Burger, Jing Wang, Hua Wang 0006. 297-300 [doi]
• A 128-channel neural stimulation and recording ASIC for scalable cortical visual prosthesisBogdan C. Raducanu, Joan Aymerich, Wen-Yang Hsu, Patrick Hendrickx, Carolina Mora Lopez. 301-304 [doi]
• A Wireless Multimodal Physiological Monitoring ASIC for Injectable ImplantsLinran Zhao, Raymond Stephany, Yiming Han, Parvez Ahmmed, Alper Bozkurt, Yaoyao Jia. 305-308 [doi]
• 2 Guidewire IVUS SoC with ±50°-Range Plane Wave Transmit BeamformingXitie Zhang, Evren F. Arkan, Coskun Tekes, Tzuhan Wang, F. Levent Degertekin, Shaolan Li. 309-312 [doi]
• A 13.56 MHz Active Rectifier with Digitally-Assisted and Delay Compensated Comparators for Biomedical Implantable DevicesMohammad Javad Karimi, Catherine Dehollain, Alexandre Schmid. 313-316 [doi]
• A 26nA Ultra-Low Input Current, 81nW Ultra-Low Power and 1μs Recovery Time Ultra-Fast Transient DC-DC Buck Converter for Internet-of-ThingsSheng-Cheng Lee, Yu-Teng Liang, Hsing-Yen Tsai, Jia-Rui Huang, Peng-Chu Chen, Chao-Heng Liu, Yu-Tse Shih, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 317-320 [doi]
• A 15.7-V-Compliant 86% Peak Efficiency Current-Mode Stimulator With Dynamic Voltage Supply for Implantable Medical DevicesYou You, Ruizhi Tian, Yacong Zhang, Zhongjian Chen, Wengao Lu, Yihan Zhang 0002. 321-324 [doi]
• Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy HarvestingHikaru Sebe, Tomohisa Okumura, Shintaro Sumi, Daisuke Kanemoto, Po-Hung Chen, Tetsuya Hirose. 325-328 [doi]
• A 12b 1GS/s Pipelined ADC with Digital Background Calibration of Inter-stage Gain, Capacitor Mismatch, and Kick-back ErrorsMingyang Gu, Yi Zhong, Lu Jie, Nan Sun 0001. 329-332 [doi]
• A 12/16 GSps Time-Interleaved Pipelined-SAR ADC with Temperature Robust Performance at 0.75V Supply in 7nm FinFET TechnologyMattias Palm, Daniele Mastantuono, Christer Jansson, Erik Backenius, Nikola Ivanisevic, Mikael Normark, Prakash Harikumar, My-Chien Yee, Andreas Leidenhed, Roland Strandberg, Sunny Sharma, Hanie Ghaedrahmati, Martin Anderson, Peter Nygren, Peter Sjögren, Erik Säll, Robert Hägglund, Lars Sundström. 333-336 [doi]
• A 4.8 GS/s 11b Time-Interleaved TDC-Assisted SAR ADC with High-Speed Latch-based VTCHao Deng 0003, Phaneendra Bikkina, Esko Mikkola, Runxi Zhang, Jinghong Chen. 337-340 [doi]
• A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting ApplicationSoufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé. 341-344 [doi]
• A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Pico Aerial VehiclesPingcheng Dong, Zhuoyu Chen, Ke Li, Lei Chen 0070, Kwang-Ting Cheng, Fengwei An. 345-348 [doi]
• JNPU: A 1.04TFLOPS Joint-DNN Training Processor with Speculative Cyclic Quantization and Triple Heterogeneity on Microarchitecture / Precision / DataflowJe Yang, Sukbin Lim, Sukjin Lee, Jae-Young Kim, Joo-Young Kim. 349-352 [doi]
• A 49nV/√Hz 87.8dB-SNDR 4-Channel Digital Active Electrode System for Gel-Free and Motion-Tolerant Wearable EEG AcquisitionChao Yuan, Yuying Li, Hao Li, Yijie Li, Zhiliang Hong, Jiawei Xu 0001. 353-356 [doi]
• A 3.8 mW 1.9 m Ω/√Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading CalibrationSoyeon Um, Jaehyuk Lee, Hoi-Jun Yoo. 357-360 [doi]
• An Electrical Impedance Spectroscopy IC with a Printable, Fractal Root Textile Sensor for Perspiration AnalysisYung-Hua Yeh, Wei-Cheng Liu, Yi-Jie Lin, Yu-Siang Chou, Yu-Chiao Huang, Min-Hua Chang, I-Te Lin, Yen-Chi Chen, Ying-Chih Liao, Yu-Te Liao. 361-364 [doi]
• True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOIUrs Hecht, Helia Ordouei, Nikolay Ledentsov Jr., Philipp Scholz, Patrick Kurth, Nikolay N. Ledentsov, Friedel Gerfers. 365-368 [doi]
• A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET ProcessMilad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami. 369-372 [doi]
• A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOSFuzhan Chen, Chongyun Zhang, Li Wang, Quan Pan 0002, C. Patrick Yue. 373-376 [doi]
• A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS ConfigurationZhe Liu 0038, Chirn Chye Boon, Yangtao Dong, Kaituo Yang. 377-380 [doi]
• A wideband sub-6GHz continuously tunable gm-boosted CG Low Noise Amplifier in 28 nm FD-SOI CMOS technologyMohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel. 381-384 [doi]
• A 37-to-41.8 GHz Double-Gm-Boosting LNA with 2.9-dB NFmin Using Quadruple-Coupling Transformer for Phased-Array TransceiversDongze Li, Wei Deng 0001, Haikun Jia, Ruiheng Qiu, Xintao Li, Ziyuan Guo, Baoyong Chi. 385-388 [doi]
• A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOSLucas Moura Santana, Ewout Martens, Jorge Lagos 0001, Piet Wambacq, Jan Craninckx. 389-392 [doi]
• An 18.2μW 101.1dB DR Fully-Dynamic ΔΣ ADC with Partially-Feedback Noise-Shaping Quantizer and CLS-Embedded Two-Stage FIAsLingxin Meng, Junsheng Chen, Menglian Zhao, Zhichao Tan. 393-396 [doi]
• A 2MHz-BW 96.8dB-SNDR 98dB-SNR CT-Zoom ADC With Residue Feedforward, Redundancy and Fully LMS-Based CalibrationYijie Li, Lairong Fang, Xiaoyang Zeng, Zhiliang Hong, Jiawei Xu 0001. 397-400 [doi]
• A 40 kS/sCalibration-Free Incremental △Σ ADC Achieving 104 dB DR and 105.7 dB SFDRMohamed A. Mokhtar, Omar Ismail, Patrick Vogelmann, John G. Kauffman, Maurits Ortmanns. 401-404 [doi]
• FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing MacroJyotishman Saikia, Amitesh Sridharan, Injune Yeo, Shreyas K. Venkataramanaiah, Deliang Fan, Jae-sun Seo. 405-408 [doi]
• 2 and 23. 8TOPs/WWeijie Jiang, Pouya Houshmand, Marian Verhelst, Wim Dehaene. 409-412 [doi]
• 2 Digital 6T-SRAM-Based Compute-in-Memory Macro Supporting 1-to-8b Fixed-Point Arithmetic in 28-nm CMOSJonghyun Oh, Chuan-Tung Lin, Mingoo Seok. 413-416 [doi]
• A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/WMohit Gupta, Stefan Cosemans, Peter Debacker, Wim Dehaene. 417-420 [doi]
• microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory HardwareDewei Wang, Jonghyun Oh, Gregory K. Chen, Phil C. Knag, Ram K. Krishnamurthy, Mingoo Seok. 421-424 [doi]
• A 2-8V Vin 670mA Scalable Multi-Ratio SC DCDC Converter for MCU Integration in 28nm CMOS Achieving 91% Peak EfficiencyAdrian Gehl, Kyrylo Cherniak, Olga Kharko, Gianluca Marin, Petru Bacinski, Frank Prämaßing, Bernhard Wicht. 425-428 [doi]
• A Hybrid Buck Converter Stacked on Auxiliary-switched-capacitor Using Analog and Digital Dynamic Voltage Scaling TechniquesTzu-Ying Wu, Zeng Shi-Jun, Tz-Wun Wang, Sheng-Cheng Lee, Ya-Ting Hsu, Yu-Tse Shih, Jia-Rui Huang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 429-432 [doi]
• A Compact Wide-Input-Range Time-Domain Buck Converter with Fast Transient Response for Industrial ApplicationsPaolo Melillo, Mauro Leoncini, Simone Zaffin, Alberto Brunero, Alessandro Gasparini, Salvatore Levantino, Massimo Ghioni. 433-436 [doi]
• 93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code RoamingZhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Orlando Lazaro, Andres Blanco, Xin Zhang, Mingoo Seok. 437-440 [doi]
• A Time-Domain CCM/DCM Current-Mode Buck Converter with a PI Compensator Incorporating an Infinite Phase Shift Delay LineMao-Ling Chiu, I-Fang Lo, Tsung-Hsien Lin. 441-444 [doi]
• A 53-62 GHz Two-channel Differential 6-bit Active Phase Shifter in 55-nm SiGe TechnologyMorteza Tavakoli Taba, S. M. Hossein Naghavi, Sara Shoouri, Andreia Cathelin, Ehsan Afshari. 445-448 [doi]
• A 24-49-GHz CMOS Area-Efficient Phase-Invariant Mixed-Type Attenuator With Capacitive Compensation for 5G New RadioZheng Li, Peng Luo, Jian Pang, Qiaoyu Wang, Atsushi Shirane, Kenichi Okada. 449-452 [doi]
• A 24-to-30 GHz Series-Doherty Power Amplifier With Novel Broadband Combiner Achieving 2.5% Back-off PAE Variation in 65-nm CMOSJiawen Chen, Haoshen Zhu, Quan Xue. 453-456 [doi]
• A Compact K-band, Asymmetric Coupler-based, Switchless Transmit-Receive Front-End in 0.15μm GaN-on-SiC TechnologyDongyang Yan, Sehoon Park, Yang Zhang 0081, Mark Ingels, Piet Wambacq. 457-460 [doi]
• A Scalable Multi-Chip Self-Aligning Ka-Band Phased ArrayRuixing He, Alireza Rouhafza, Yahya M. Tousi. 461-464 [doi]
• Analog and Mixed-Signal CMOS Circuits: The emergence and leadership of a Lab, a reference Book and the future at the core of the A/D Interface in the IoERui P. Martins. 465-468 [doi]
• 2, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read CircuitryLuke R. Upton, Akash Levy, Michael D. Scott 0002, Dennis Rich, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina, Boris Murmann. 469-472 [doi]
• A 22nm 56TOPS/W 6/8-bit Linearly-scalable R-2R Multiply-and-Accumulate Architecture with 2.2ns LatencyTianwen Tang, Antonio Liscidini. 473-476 [doi]
• CIMGN: An Energy-efficient All-digital Compute-in-memory Graph Neural Network ProcessorYipeng Wang 0017, Mengtian Yang, Shanshan Xie, Meizhi Wang, Jaydeep P. Kulkarni. 477-480 [doi]
• An RF MEMS Sensor Driver/Readout SoC with Resonant Frequency Shift and Closed-Loop Envelope Regulation for Microplastic DetectionSeung-Beom Ku, Kwonhong Lee, Han-Sol Lee, Kyeongho Eom, Minju Park, Jinhyoung Kim, Cheolung Cha, Hyung-Min Lee. 481-484 [doi]
• A 22dBA digital optical MEMS microphoneNiccolò de Milleri, Andreas Wiesbauer, Andrea Baschirotto. 485-488 [doi]
• A Monolithically Integrated Electronic-Photonic Front-end Utilizing Micro-ring Modulators for Large-Scale mm-wave SensingRuocheng Wang, Manuj Singh, Deniz Onural, Sidney Buchbinder, Hayk Gevorgyan, Milos A. Popovic, Vladimir Stojanovic. 489-492 [doi]
• A linearity improvement method for CIS column-parallel SAR ADC using two-step conversionJaekyum Lee, Albert Theuwissen. 493-496 [doi]
• Ultra Broadband Phased-Array Transmitter with Low Phase Error of 1.24-2.8° across 36-91 GHz Supporting 10.8 Gbps 64QAM in 90 nm SiGeZheng Liu, Emir Ali Karahan, Kaushik Sengupta. 497-500 [doi]
• A Low-Power 28-GHz Beamforming Receiver with On-Chip LO SynthesisPawan K. Khanna, Yu Zhao, Mahdi Forghani, Behzad Razavi. 501-504 [doi]
• Fast Chirping 58-64 GHz FMCW Radar Transceiver using D-PROT Multiplier in CMOS 45nm RFSOI for Vital Signs DetectionAlexandre Siligaris, A. Bossuet, L. Barrau, E. Antide, José Luis Gonzalez-Jimenez, Cédric Dehos, Mykhailo Zarudniev. 505-508 [doi]
• A 49-63 GHz Phase-locked FMCW Radar Transceiver for High Resolution ApplicationsXuyang Liu, Md Hedayatullah Maktoomi, Mahdi Alesheikh, Payam Heydari, Hamidreza Aghasi. 509-512 [doi]